[U-Boot] [PATCH] mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards

[Anton Vorontsov]

Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.

Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
---
 board/freescale/mpc8569mds/mpc8569mds.c |   14 ++++++++++++++
 include/configs/MPC8569MDS.h            |    4 ++++
 2 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index cdd7813..6e90c09 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -437,6 +437,11 @@ int board_mmc_init(bd_t *bd)
 		console_assign(stdin, "eserial1");
 		printf("Switched to UART1 (initial log has been printed to "
 		       "UART0).\n");
+
+		clrsetbits_be32(&gur->plppar1, PLPPAR1_UART0_BIT_MASK,
+					       PLPPAR1_ESDHC_4BITS_VAL);
+		clrsetbits_be32(&gur->plpdir1, PLPDIR1_UART0_BIT_MASK,
+					       PLPDIR1_ESDHC_4BITS_VAL);
 		bcsr6 |= BCSR6_SD_CARD_4BITS;
 	} else {
 		printf("should be disabled.\n");
@@ -483,6 +488,15 @@ static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
 			break;
 		}
 	}
+
+	if (hwconfig_subarg_cmp("esdhc", "mode", "4-bits")) {
+		off = fdt_node_offset_by_compatible(blob, -1, "fsl,esdhc");
+		if (off < 0) {
+			printf("WARNING: could not find esdhc node\n");
+			return;
+		}
+		fdt_delprop(blob, off, "sdhci,1-bit-only");
+	}
 }
 #else
 static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 1e659e2..e16f0e1 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -277,6 +277,10 @@ extern unsigned long get_clock_freq(void);
 #define PLPDIR1_I2C_BIT_MASK		0x0000000F
 #define PLPDIR1_I2C2_VAL		0x0000000F
 #define PLPDIR1_ESDHC_VAL		0x00000006
+#define PLPPAR1_UART0_BIT_MASK		0x00000fc0
+#define PLPPAR1_ESDHC_4BITS_VAL		0x00000a80
+#define PLPDIR1_UART0_BIT_MASK		0x00000fc0
+#define PLPDIR1_ESDHC_4BITS_VAL		0x00000a80
 
 /*
  * General PCI
-- 
1.6.3.3