[U-Boot] [PATCH 8/9] SPEAr320 SoC support added
Vipin KUMAR
vipin.kumar at st.com
Wed Dec 16 10:18:29 CET 2009
Signed-off-by: Vipin <vipin.kumar at st.com>
---
MAKEALL | 1 +
Makefile | 3 +
board/spear/spear320/Makefile | 52 ++++++
board/spear/spear320/config.mk | 42 +++++
board/spear/spear320/spr320_board.c | 58 ++++++
include/configs/spear320.h | 336 +++++++++++++++++++++++++++++++++++
6 files changed, 492 insertions(+), 0 deletions(-)
create mode 100755 board/spear/spear320/Makefile
create mode 100755 board/spear/spear320/config.mk
create mode 100755 board/spear/spear320/spr320_board.c
create mode 100755 include/configs/spear320.h
diff --git a/MAKEALL b/MAKEALL
index 3abb4f0..0672ba0 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -574,6 +574,7 @@ LIST_ARM9=" \
smdk2410 \
spear300 \
spear310 \
+ spear320 \
trab \
VCMA9 \
versatile \
diff --git a/Makefile b/Makefile
index 44f1d8b..1f60204 100644
--- a/Makefile
+++ b/Makefile
@@ -3062,6 +3062,9 @@ spear300_config : unconfig
spear310_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs spear310 spear spear
+spear320_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs spear320 spear spear
+
SX1_stdout_serial_config \
SX1_config: unconfig
@mkdir -p $(obj)include
diff --git a/board/spear/spear320/Makefile b/board/spear/spear320/Makefile
new file mode 100755
index 0000000..1ddd1c2
--- /dev/null
+++ b/board/spear/spear320/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := spr320_board.o \
+ ../common/spr_misc.o
+SOBJS := ../common/spr_lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/spear/spear320/config.mk b/board/spear/spear320/config.mk
new file mode 100755
index 0000000..8b7aa05
--- /dev/null
+++ b/board/spear/spear320/config.mk
@@ -0,0 +1,42 @@
+#
+# (C) Copyright 2009
+# Vipin Kumar, ST Microelectronics <vipin.kumar at st.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#########################################################################
+
+TEXT_BASE = 0x00700000
+
+ALL += $(obj)u-boot.img
+
+# Environment variables in NAND
+ifeq ($(ENV),NAND)
+PLATFORM_RELFLAGS += -DENV_IN_NAND
+endif
+
+ifeq ($(FLASH),PNOR)
+PLATFORM_RELFLAGS += -DPNOR_FLASH
+endif
+
+ifeq ($(CONSOLE),USB)
+PLATFORM_RELFLAGS += -DCONFIG_SPEAR_USBTTY
+endif
+
diff --git a/board/spear/spear320/spr320_board.c b/board/spear/spear320/spr320_board.c
new file mode 100755
index 0000000..750e303
--- /dev/null
+++ b/board/spear/spear320/spr320_board.c
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2009
+ * Ryan Chen, ST Micoelectronics, ryan.chen at st.com.
+ * Vipin Kumar, ST Micoelectronics, vipin.kumar at st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+#include <asm/arch/spr_defs.h>
+#include <asm/arch/spr_misc.h>
+#include <asm/arch/spr_nand.h>
+
+int board_init(void)
+{
+ return spear_board_init(MACH_TYPE_SPEAR300);
+}
+
+/**
+ * board_nand_init - Board specific NAND initialization
+ * @nand: mtd private chip structure
+ *
+ * Called by nand_init_chip to initialize the board specific functions
+ */
+
+int board_nand_init(struct nand_chip *nand)
+{
+ struct misc_regs *const misc_regs_p =
+ (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
+
+ if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
+ MISC_SOCCFG30) ||
+ ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
+ MISC_SOCCFG31)) {
+
+ return spear_nand_init(nand);
+ } else {
+ return -1;
+ }
+}
diff --git a/include/configs/spear320.h b/include/configs/spear320.h
new file mode 100755
index 0000000..1fb0474
--- /dev/null
+++ b/include/configs/spear320.h
@@ -0,0 +1,336 @@
+/*
+ * (C) Copyright 2009
+ * Vipin Kumar, STMicroelectronics, <vipin.kumar at st.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_SPEAR3XX 1
+#define CONFIG_SPEAR320 1
+
+/*
+ * Ethernet MAC driver configuration
+ */
+/* #define CONFIG_SPEAR_SMII */
+/* #define CONFIG_SPEARMAC */
+/* #define CONFIG_ETHAUTONEG */
+/* #define CONFIG_ETHDEBUG */
+
+/*
+ * SMII driver configuratin
+ */
+#ifdef CONFIG_SPEAR_SMII
+#define SPR320_SMII0_BASE 0xAA000000
+#define SPR320_SMII0_PHY 0x01
+#endif
+
+
+/*
+ * USBD driver configuration
+ */
+#define CONFIG_SPEARUDC
+#define CONFIG_USB_DEVICE
+#define CONFIG_USB_TTY
+#define CONFIG_SYS_USBD_BASE (0xE1100000)
+#define CONFIG_SYS_PLUG_BASE (0xE1200000)
+#define CONFIG_SYS_FIFO_BASE (0xE1000800)
+#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
+#define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
+
+#define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm"
+
+/*
+ * I2C driver configuration
+ */
+#define CONFIG_HARD_I2C
+#define CONFIG_SPEARI2C
+#define CONFIG_SYS_I2C_BASE 0xD0180000
+#define CONFIG_SYS_I2C_SPEED 400000
+#define CONFIG_SYS_I2C_SLAVE 0x02
+
+/* #define CONFIG_SYS_I2C_MULTI_EEPROMS */
+/* #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1 */
+
+/*
+ * SMI driver configuration
+ */
+#if defined(PNOR_FLASH)
+#define CONFIG_SPEAR_EMI 1
+#else
+#define CONFIG_SPEARSMI 1
+#endif
+
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_SMI_BASE 0xFC000000
+
+/*
+ * Serial Configuration (PL011)
+ */
+#define CONFIG_SPEAR320_CUST_UART 1
+
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
+#define CONFIG_CONS_INDEX 0
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
+ 57600, 115200 }
+#define CONFIG_SYS_SERIAL0 0xD0000000
+
+#ifdef CONFIG_SPEAR320_CUST_UART
+
+#if (CONFIG_CONS_INDEX)
+#undef CONFIG_PL011_CLOCK
+#define CONFIG_PL011_CLOCK (83 * 1000 * 1000)
+#endif
+
+#define CONFIG_SYS_SERIAL1 0xA3000000
+#define CONFIG_SYS_SERIAL2 0xA4000000
+#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
+ (void *)CONFIG_SYS_SERIAL1, \
+ (void *)CONFIG_SYS_SERIAL2}
+#else
+#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0 }
+#endif
+
+#define CONFIG_SYS_LOADS_BAUD_CHANGE
+
+/*
+ * Platform specific defines (SPEAr)
+ */
+#define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000)
+#define CONFIG_SPEAR_TIMERBASE (0xFC800000)
+#define CONFIG_SPEAR_MISCBASE (0xFCA80000)
+#define CONFIG_SYS_HZ (26000)
+#define CONFIG_SPEAR_EMIBASE (0x40000000)
+#define CONFIG_SPEAR_RASBASE (0xB3000000)
+
+/*
+ * Board Specific Defines (SPEAr320)
+ */
+
+/*
+ * FLASH Configuration
+ */
+#if defined(CONFIG_SPEARSMI)
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_FLASH_BASE (0xF8000000)
+#define CONFIG_SYS_FLASH_BANK_SIZE (0x01000000)
+#define CONFIG_SYS_FLASH_ADDR_BASE {0xF8000000, 0xF9000000}
+#define CONFIG_SYS_MAX_FLASH_SECT 128
+
+#define CONFIG_SYS_FLASH_EMPTY_INFO 1
+#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
+
+#elif defined(CONFIG_SPEAR_EMI)
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+/* #define CONFIG_SYS_FLASH_PROTECTION */
+#define CONFIG_SYS_FLASH_BASE 0x44000000
+#define CONFIG_SYS_CS1_FLASH_BASE 0x45000000
+#define CONFIG_SYS_CS2_FLASH_BASE 0x46000000
+#define CONFIG_SYS_CS3_FLASH_BASE 0x47000000
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
+ CONFIG_SYS_CS1_FLASH_BASE, \
+ CONFIG_SYS_CS2_FLASH_BASE, \
+ CONFIG_SYS_CS3_FLASH_BASE }
+#define CONFIG_SYS_MAX_FLASH_BANKS 4
+#define CONFIG_SYS_MAX_FLASH_SECT (127 + 8)
+
+#define CONFIG_SYS_FLASH_QUIET_TEST 1
+
+/* For Intel/ST legacy flash */
+/* #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes" */
+
+#endif
+/*
+ * NAND FLASH Configuration
+ */
+#define CONFIG_NAND_SPEAR 1
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x50000000
+#define CONFIG_SYS_NAND_CLE (1 << 16)
+#define CONFIG_SYS_NAND_ALE (1 << 17)
+#define CONFIG_MTD_NAND_VERIFY_WRITE 1
+
+/*
+ * FSMC NAND driver configuration
+ */
+#define CONFIG_SPEAR_FSMCBASE (0x4C000000)
+
+/*
+ * Command support defines
+ */
+/* #define CONFIG_CMD_CACHE */
+/* #define CONFIG_CMD_CDP */
+/* #define CONFIG_CMD_DHCP */
+#define CONFIG_CMD_I2C
+/* #define CONFIG_CMD_ELF */
+/* #define CONFIG_CMD_PING */
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_ENV
+/* #define CONFIG_CMD_JFFS2 */
+/* #define CONFIG_CMD_YAFFS2 */
+#define CONFIG_CMD_MEMORY
+/* #define CONFIG_CMD_MII */
+/* #define CONFIG_MII */
+/* #define CONFIG_NET_MULTI */
+/* #define CONFIG_CMD_NET */
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_SETFREQ
+/* #define CONFIG_CMD_EEPROM */
+
+/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+/*
+ * Default Environment Varible definitions
+ */
+#define CONFIG_BOOTDELAY 1
+#define CONFIG_BOOTARGS_NFS "root=/dev/nfs ip=dhcp " \
+ "console=ttyS0 init=/bin/sh"
+
+/* #define CONFIG_ETHADDR 00:11:22:33:44:55 */
+
+/* #define CONFIG_NETMASK 255.255.255.0 */
+/* #define CONFIG_IPADDR 192.168.1.10 */
+/* #define CONFIG_SERVERIP 192.168.1.1 */
+/* #define CONFIG_GATEWAYIP 192.168.1.1 */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * U-Boot Environment placing definitions.
+ */
+#ifdef ENV_IN_NAND
+#define CONFIG_ENV_IS_IN_NAND
+#else
+#define CONFIG_ENV_IS_IN_FLASH
+#endif
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+#ifdef CONFIG_SPEARSMI
+/*
+ * Environment is in serial NOR flash
+ */
+#define CONFIG_SYS_MONITOR_LEN 0x00040000
+#define CONFIG_ENV_SECT_SIZE 0x00010000
+
+#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \
+ "root=/dev/mtdblock3 " \
+ "rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
+
+#elif defined(CONFIG_SPEAR_EMI)
+/*
+ * Environment is in parallel NOR flash
+ */
+#define CONFIG_SYS_MONITOR_LEN 0x00060000
+#define CONFIG_ENV_SECT_SIZE 0x00020000
+
+#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \
+ "root=/dev/mtdblock8 " \
+ "rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 "\
+ "0x4C0000; bootm 0x1600000"
+
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_ENV_SIZE 0x00002000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
+ CONFIG_SYS_MONITOR_LEN)
+
+#elif defined(CONFIG_ENV_IS_IN_NAND)
+
+#define CONFIG_ENV_OFFSET 0x60000
+#define CONFIG_ENV_SIZE 0x04000
+/* #define CONFIG_ENV_OFFSET_REDUND 0x58000 */
+#define CONFIG_ENV_RANGE 0x10000
+
+#define CONFIG_BOOTARGS "console=ttyS0 mem=128M " \
+ "root=/dev/mtdblock12 " \
+ "rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 "\
+ "0x60000 0x4C0000; " \
+ "bootm 0x1600000"
+
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+
+#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
+#define CONFIG_CMDLINE_TAG 1
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_MISC_INIT_R 1
+#define CONFIG_ZERO_BOOTDELAY_CHECK 1
+#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT_STOP_STR " "
+#define CONFIG_AUTOBOOT_PROMPT \
+ "Hit SPACE in %d seconds to stop autoboot.\n", bootdelay
+
+#define CONFIG_SYS_MEMTEST_START 0x00800000
+#define CONFIG_SYS_MEMTEST_END 0x04000000
+#define CONFIG_SYS_MALLOC_LEN (1024*1024)
+#define CONFIG_IDENT_STRING "-SPEAr320"
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "u-boot> "
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LOAD_ADDR 0x00800000
+#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
+#define CONFIG_SYS_64BIT_VSPRINTF 1
+
+/*
+ * Stack sizes
+ */
+#define CONFIG_STACKSIZE (128*1024)
+
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024)
+#define CONFIG_STACKSIZE_FIQ (4*1024)
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 0x00000000
+#define PHYS_SDRAM_1_MAXSIZE 0x40000000
+
+#endif /* __CONFIG_H */
+
--
1.6.0.2
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