[U-Boot] [PATCH 25/25] Blackfin: add support for BF527-EZKIT v2.1

Mike Frysinger vapier at gentoo.org
Thu Dec 17 03:44:10 CET 2009


From: Michael Hennerich <michael.hennerich at analog.com>

The new board revision has a different LCD.

Signed-off-by: Michael Hennerich <michael.hennerich at analog.com>
Signed-off-by: Mike Frysinger <vapier at gentoo.org>
---
i've removed include/asm-blackfin/bfin_logo_rgb565_230x230.h from the
diffstat since it's so big (120kb) and it's generated output from
easylogo and the Blackfin .tga.

 MAINTAINERS                                     |    1 +
 MAKEALL                                         |    1 +
 Makefile                                        |    5 +-
 board/bf527-ezkit/video.c                       |  144 +++-
 include/asm-blackfin/bfin_logo_rgb565_230x230.h | 1242 +++++++++++++++++++++++
 include/configs/bf527-ezkit.h                   |    9 +
 6 files changed, 1389 insertions(+), 13 deletions(-)
 create mode 100644 include/asm-blackfin/bfin_logo_rgb565_230x230.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 2ef158d..ce1845c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -942,6 +942,7 @@ Blackfin Team <u-boot-devel at blackfin.uclinux.org>
 	BF518F-EZBRD	BF518
 	BF526-EZBRD	BF526
 	BF527-EZKIT	BF527
+	BF527-EZKIT-V2	BF527
 	BF533-EZKIT	BF533
 	BF533-STAMP	BF533
 	BF537-PNAV	BF537
diff --git a/MAKEALL b/MAKEALL
index acb35d2..c4577ff 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -869,6 +869,7 @@ LIST_blackfin="		\
 	bf518f-ezbrd	\
 	bf526-ezbrd	\
 	bf527-ezkit	\
+	bf527-ezkit-v2	\
 	bf533-ezkit	\
 	bf533-stamp	\
 	bf537-minotaur	\
diff --git a/Makefile b/Makefile
index 9ce0ecf..4e56efd 100644
--- a/Makefile
+++ b/Makefile
@@ -3565,7 +3565,10 @@ BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp
 BFIN_BOARDS += ibf-dsp561
 
 $(BFIN_BOARDS:%=%_config)	: unconfig
-	@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
+	@$(MKCONFIG) $(MKCONFIG_$(@:_config=)) $(@:_config=) blackfin blackfin $(@:_config=)
+
+bf527-ezkit-v2_config	: unconfig
+	@$(MKCONFIG) -t BF527_EZKIT_REV_2_1 bf527-ezkit blackfin blackfin bf527-ezkit
 
 #========================================================================
 # AVR32
diff --git a/board/bf527-ezkit/video.c b/board/bf527-ezkit/video.c
index 0b6b7b2..7054273 100644
--- a/board/bf527-ezkit/video.c
+++ b/board/bf527-ezkit/video.c
@@ -12,27 +12,96 @@
 #include <malloc.h>
 #include <asm/blackfin.h>
 #include <asm/mach-common/bits/dma.h>
-#include <i2c.h>
+#include <spi.h>
 #include <linux/types.h>
 #include <stdio_dev.h>
 
 int gunzip(void *, int, unsigned char *, unsigned long *);
 
-#define DMA_SIZE16	2
-
 #include <asm/mach-common/bits/ppi.h>
 #include <asm/mach-common/bits/timer.h>
 
+#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1 /* lq035q1 */
+
+#define LCD_X_RES		320	/* Horizontal Resolution */
+#define LCD_Y_RES		240	/* Vertical Resolution */
+#define	DMA_BUS_SIZE		16
+
+#if !(defined(CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI) || defined(CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI))
+#define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
+#endif
+
+/* Interface 16/18-bit TFT over an 8-bit wide PPI using a small Programmable Logic Device (CPLD)
+ * http://blackfin.uclinux.org/gf/project/stamp/frs/?action=FrsReleaseBrowse&frs_package_id=165
+ */
+
+#ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
+#include <asm/bfin_logo_rgb565_230x230.h>
+#define LCD_BPP		16	/* Bit Per Pixel */
+#define CLOCKS_PER_PIX	2
+#define CPLD_PIPELINE_DELAY_COR 3	/* RGB565 */
+#endif
+
+#ifdef CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
+#include <asm/bfin_logo_230x230.h>
+#define LCD_BPP		24	/* Bit Per Pixel */
+#define CLOCKS_PER_PIX	3
+#define CPLD_PIPELINE_DELAY_COR 5	/* RGB888 */
+#endif
+
+	/*
+	 * HS and VS timing parameters (all in number of PPI clk ticks)
+	 */
+
+#define U_LINE		4				/* Blanking Lines */
+
+#define H_ACTPIX	(LCD_X_RES * CLOCKS_PER_PIX)	/* active horizontal pixel */
+#define H_PERIOD	(336 * CLOCKS_PER_PIX)		/* HS period */
+#define H_PULSE		(2 * CLOCKS_PER_PIX)				/* HS pulse width */
+#define H_START		(7 * CLOCKS_PER_PIX + CPLD_PIPELINE_DELAY_COR)	/* first valid pixel */
+
+#define	V_LINES		(LCD_Y_RES + U_LINE)		/* total vertical lines */
+#define V_PULSE		(2 * CLOCKS_PER_PIX)		/* VS pulse width (1-5 H_PERIODs) */
+#define V_PERIOD	(H_PERIOD * V_LINES)		/* VS period */
+
+#define ACTIVE_VIDEO_MEM_OFFSET		((U_LINE / 2) * LCD_X_RES * (LCD_BPP / 8))
+
+/*
+ * LCD Modes
+ */
+#define LQ035_RL	(0 << 8)	/* Right -> Left Scan */
+#define LQ035_LR	(1 << 8)	/* Left -> Right Scan */
+#define LQ035_TB	(1 << 9)	/* Top -> Botton Scan */
+#define LQ035_BT	(0 << 9)	/* Botton -> Top Scan */
+#define LQ035_BGR	(1 << 11)	/* Use BGR format */
+#define LQ035_RGB	(0 << 11)	/* Use RGB format */
+#define LQ035_NORM	(1 << 13)	/* Reversal */
+#define LQ035_REV	(0 << 13)	/* Reversal */
+
+#define LQ035_INDEX			0x74
+#define LQ035_DATA			0x76
+
+#define LQ035_DRIVER_OUTPUT_CTL		0x1
+#define LQ035_SHUT_CTL			0x11
+
+#define LQ035_DRIVER_OUTPUT_MASK	(LQ035_LR | LQ035_TB | LQ035_BGR | LQ035_REV)
+#define LQ035_DRIVER_OUTPUT_DEFAULT 	(0x2AEF & ~LQ035_DRIVER_OUTPUT_MASK)
+
+#define LQ035_SHUT			(1 << 0)	/* Shutdown */
+#define LQ035_ON			(0 << 0)	/* Shutdown */
+
+#ifndef CONFIG_LQ035Q1_LCD_MODE
+#define CONFIG_LQ035Q1_LCD_MODE		(LQ035_NORM | LQ035_RL | LQ035_TB | LQ035_BGR)
+#endif
+
+#else /* t350mcqb */
 #include <asm/bfin_logo_230x230.h>
 
 #define LCD_X_RES		320	/* Horizontal Resolution */
 #define LCD_Y_RES		240	/* Vertical Resolution */
-#define LCD_BPP			24	/* Bit Per Pixel */
-#define LCD_PIXEL_SIZE		(LCD_BPP / 8)
 
+#define LCD_BPP			24	/* Bit Per Pixel */
 #define	DMA_BUS_SIZE		16
-#define	LCD_CLK         	(12*1000*1000)	/* 12MHz */
-
 #define CLOCKS_PER_PIX		3
 
 /* HS and VS timing parameters (all in number of PPI clk ticks) */
@@ -48,6 +117,10 @@ int gunzip(void *, int, unsigned char *, unsigned long *);
 #define V_PERIOD	(H_PERIOD * V_LINES)		/* VS period */
 
 #define ACTIVE_VIDEO_MEM_OFFSET	(U_LINE * H_ACTPIX)
+#endif
+
+#define LCD_PIXEL_SIZE		(LCD_BPP / 8)
+#define DMA_SIZE16		2
 
 #define PPI_TX_MODE		0x2
 #define PPI_XFER_TYPE_11	0xC
@@ -55,6 +128,40 @@ int gunzip(void *, int, unsigned char *, unsigned long *);
 #define PPI_PACK_EN		0x80
 #define PPI_POLS_1		0x8000
 
+#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+static struct spi_slave *slave;
+static int lq035q1_control(unsigned char reg, unsigned short value)
+{
+	int ret;
+	u8 regs[3] = {LQ035_INDEX, 0, 0};
+	u8 data[3] = {LQ035_DATA, 0, 0};
+	u8 dummy[3];
+
+	regs[2] = reg;
+	data[1] = value >> 8;
+	data[2] = value & 0xFF;
+
+	if (!slave) {
+		/* FIXME: Verify the max SCK rate */
+		slave = spi_setup_slave(CONFIG_LQ035Q1_SPI_BUS,
+				CONFIG_LQ035Q1_SPI_CS, 20000000,
+				SPI_MODE_3);
+		if (!slave)
+			return -1;
+	}
+
+	if (spi_claim_bus(slave))
+		return -1;
+
+	ret = spi_xfer(slave, 24, regs, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+	ret |= spi_xfer(slave, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
+
+	spi_release_bus(slave);
+
+	return ret;
+}
+#endif
+
 /* enable and disable PPI functions */
 void EnablePPI(void)
 {
@@ -82,7 +189,7 @@ void Init_PPI(void)
 
 	*pPPI_DELAY = H_START;
 	*pPPI_COUNT = (H_ACTPIX-1);
-	*pPPI_FRAME = 0;
+	*pPPI_FRAME = V_LINES;
 
 	/* PPI control, to be replaced with definitions */
 	*pPPI_CONTROL = PPI_TX_MODE		|	/* output mode , PORT_DIR */
@@ -111,7 +218,6 @@ void Init_DMA(void *dst)
 		FLOW_AUTO;		/* autobuffer mode */
 }
 
-
 void EnableDMA(void)
 {
 	*pDMA0_CONFIG |= DMAEN;
@@ -156,7 +262,6 @@ void DisableTIMER0(void)
 	SSYNC();
 }
 
-
 void InitTIMER1(void)
 {
 	*pTIMER_DISABLE |= TIMDIS1;			/* disable Timer */
@@ -180,19 +285,30 @@ void InitTIMER1(void)
 
 void EnableTIMER1(void)
 {
-	*pTIMER_ENABLE  |= TIMEN1;
+	*pTIMER_ENABLE |= TIMEN1;
 	SSYNC();
 }
 
 void DisableTIMER1(void)
 {
-	*pTIMER_DISABLE  |= TIMDIS1;
+	*pTIMER_DISABLE |= TIMDIS1;
+	SSYNC();
+}
+
+void EnableTIMER12(void)
+{
+	*pTIMER_ENABLE |= TIMEN1 | TIMEN0;
 	SSYNC();
 }
 
 int video_init(void *dst)
 {
 
+#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+	lq035q1_control(LQ035_SHUT_CTL, LQ035_ON);
+	lq035q1_control(LQ035_DRIVER_OUTPUT_CTL, (CONFIG_LQ035Q1_LCD_MODE &
+		LQ035_DRIVER_OUTPUT_MASK) | LQ035_DRIVER_OUTPUT_DEFAULT);
+#endif
 	Init_Ports();
 	Init_DMA(dst);
 	EnableDMA();
@@ -201,6 +317,9 @@ int video_init(void *dst)
 	Init_PPI();
 	EnablePPI();
 
+#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+	EnableTIMER12();
+#else
 	/* Frame sync 2 (VS) needs to start at least one PPI clk earlier */
 	EnableTIMER1();
 	/* Add Some Delay ... */
@@ -211,6 +330,7 @@ int video_init(void *dst)
 
 	/* now start frame sync 1 */
 	EnableTIMER0();
+#endif
 
 	return 0;
 }
diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h
index c7322b8..7800c32 100644
--- a/include/configs/bf527-ezkit.h
+++ b/include/configs/bf527-ezkit.h
@@ -155,6 +155,15 @@
 
 
 /*
+ * Video Settings
+ */
+#ifdef CONFIG_MK_BF527_EZKIT_REV_2_1
+# define CONFIG_LQ035Q1_SPI_BUS	0
+# define CONFIG_LQ035Q1_SPI_CS	7
+#endif
+
+
+/*
  * Misc Settings
  */
 #define CONFIG_MISC_INIT_R
-- 
1.6.5.5



More information about the U-Boot mailing list