[U-Boot] need help with flash in U-boot 2009
Pieter
phenning at vastech.co.za
Mon Feb 2 17:29:02 CET 2009
Hi all
We recently ported a MPC8548 board from U-Boot 1.2 to U-Boot 2009.01.
U-Boot seems to work fine except for Flash operations, and we can boot
Linux 2.6.27 kernel using nfs.
We are using CFI ( AMD nor flash). The problem presented it self as the
inability to erase a sector of flash. With further investigation we
became aware that we can not red the flash correctly. It seams like the
1st 16bits of the 32 bit value is read correctly, but instead of reading
the second 16bits, the 1st 16 bits are repeated. as shown below (
comparing the output of U-Boot 2009 and U-Boot 1.2
U-Boot 2009:
UBoot=> md
f8000020
f8000020: 65716571 73007300 00000000 00000000 eqeqs.s.........
U-Boot 1.2
UBoot=> md
f8000020
f8000020: 65717575 73000000 00000000 00000000 equus...........
The CFI information is consistent between U-Boot 1.2 and U-Boot 2009.
(flash vendor = 2,
portwidth = 0x4 , buffer_size = 0x20, erase_blk_tout = 0x4000,
cmd_reset = 0xf0, cfi_version = 0x3133)
which results in FLASH_CFI_32 functions.
The Flash And a CPLD is inside the same LAW and we are able to read teh
values in the CPLD correctly with both U-Boot versions. Could this be a
TLB problem or have we missed something concerning the CFI. My bootpromt
is as follows :
U-Boot 2009.01-00226-g6c6e042-dirty-svn1188 (Feb 02 2009 -
17:35:04)
CPU: 8548E, Version: 1.1,
(0x80390011)
Core: E500, Version: 1.0,
(0x80210010)
Clock
Configuration:
CPU0:990 MHz, CCB:396
MHz,
DDR:198 MHz (396 MT/s data rate), LBC:49.500
MHz
L1: D-cache 32 kB
enabled
I-cache 32 kB
enabled
Board: Equus
MPC8548
PCI1: 64 bit, 66 MHz,
sync
I2C:
ready
DRAM:
Initializing
fsl_ddr_sdram
starting at step 1
(STEP_GET_SPD)
DDR: DDR II rank density =
0x20000000
Equus hacked RD_EN to 0
(mpc8xxx/ddr/ddr2_dimm_params
Setting Equus custom ddr controll
options
DDR: 512
MB
Top of RAM usable for U-Boot at:
10000000
Reserving 301k for U-Boot at:
0ffb0000
Reserving 136k for malloc() at:
0ff8e000
Reserving 72 Bytes for Board Info at:
0ff8dfb8
Reserving 68 Bytes for Global Data at:
0ff8df74
Stack Pointer at:
0ff8df58
New Stack Pointer is:
0ff8df58
Now running in RAM - U-Boot at:
0ffb0000
FLASH: flash detect
cfi
fwc addr f8000000 cmd f0 f0 8bit x 8
bit
fwc addr f8000000 cmd ff ff 8bit x 8
bit
fwc addr f8000055 cmd 98 98 8bit x 8
bit
is= cmd 51(Q) addr f8000010 is= 0
51
fwc addr f8000555 cmd 98 98 8bit x 8
bit
is= cmd 51(Q) addr f8000010 is= 0
51
fwc addr f8000000 cmd f0 f0f0 16bit x 8
bit
fwc addr f8000000 cmd ff ffff 16bit x 8
bit
fwc addr f80000aa cmd 98 9898 16bit x 8
bit
is= cmd 51(Q) addr f8000020 is= 6571
5151
fwc addr f8000aaa cmd 98 9898 16bit x 8
bit
is= cmd 51(Q) addr f8000020 is= 6571
5151
fwc addr f8000000 cmd f0 00f0 16bit x 16
bit
fwc addr f8000000 cmd ff 00ff 16bit x 16
bit
fwc addr f80000aa cmd 98 0098 16bit x 16
bit
is= cmd 51(Q) addr f8000020 is= 6571
0051
fwc addr f8000aaa cmd 98 0098 16bit x 16
bit
is= cmd 51(Q) addr f8000020 is= 6571
0051
fwc addr f8000000 cmd f0 f0f0f0f0 32bit x 8
bit
value
0Xf0f0f0f0
addr
0Xf8000000
fwc addr f8000000 cmd ff ffffffff 32bit x 8
bit
value
0Xffffffff
addr
0Xf8000000
fwc addr f8000154 cmd 98 98989898 32bit x 8
bit
value
0X98989898
addr
0Xf8000154
is= cmd 51(Q) addr f8000040 is= 00510051
51515151
fwc addr f8001554 cmd 98 98989898 32bit x 8
bit
value
0X98989898
addr
0Xf8001554
is= cmd 51(Q) addr f8000040 is= 00510051
51515151
fwc addr f8000000 cmd f0 00f000f0 32bit x 16
bit
value
0Xf000f0
addr
0Xf8000000
fwc addr f8000000 cmd ff 00ff00ff 32bit x 16
bit
value
0Xff00ff
addr
0Xf8000000
fwc addr f8000154 cmd 98 00980098 32bit x 16
bit
value
0X980098
addr
0Xf8000154
is= cmd 51(Q) addr f8000040 is= 00510051
00510051
is= cmd 52(R) addr f8000044 is= 00520052
00520052
is= cmd 59(Y) addr f8000048 is= 00590059
00590059
device interface is
2
found port 4 chip 2 port 32 bits chip 16
bits
00 : 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 07
QRY.. at .....'6...
10 : 07 0a 00 03 05 04 00 1a 02 00 05 00 01 ff 01 00
................
20 : 02 00 00 00 00 00 00 00 00 00 00 00 00 fe c1 51
...............Q
fwc addr f8000000 cmd f0 00f000f0 32bit x 16
bit
value
0Xf000f0
addr
0Xf8000000
fwc addr f8001554 cmd aa 00aa00aa 32bit x 16
bit
value
0Xaa00aa
addr
0Xf8001554
fwc addr f8000aa8 cmd 55 00550055 32bit x 16
bit
value
0X550055
addr
0Xf8000aa8
fwc addr f8001554 cmd 90 00900090 32bit x 16
bit
value
0X900090
addr
0Xf8001554
fwc addr f8000000 cmd f0 00f000f0 32bit x 16
bit
value
0Xf000f0
addr
0Xf8000000
fwc addr f8000154 cmd 98 00980098 32bit x 16
bit
value
0X980098
addr
0Xf8000154
manufacturer is
2
manufacturer id is
0x5
device id is
0xd402
device id2 is
0x0
cfi version is
0x3133
size_ratio 2 port 32 bits chip 16
bits
found 1 erase
regions
erase region 0:
0x020001ff
erase_region_count = 512 erase_region_size =
131072
fwc addr f8000000 cmd f0 00f000f0 32bit x 16
bit
value
0Xf000f0
addr
0Xf8000000
flash_protect ON: from 0xFFF80000 to
0xFFFC3EFF
protect on
510
protect on
511
flash_protect ON: from 0xFFF40000 to
0xFFF7FFFF
protect on
509
128
MB
L2: 512 KB already
enabled
*** Warning - bad CRC, using default
environment
PH DO custom stuffs in
board_env_mod
BIE:
PCI: 64 bit, 66 MHz, sync, host,
arbiter
R0 bus_start: 20000000 phys_start: 0 size:
0
Scanning PCI bus
00
PCI Scan: Found Bus 0, Device 20, Function
0
PCI1 on bus 00 -
00
In:
serial
Out:
serial
Err:
serial
U-Boot relocated to
0ffb0000
Net: eTSEC0: PHY is Unknown/Generic PHY
(fc4b1)
eTSEC1: PHY is Unknown/Generic PHY
(fc4b1)
eTSEC2: PHY is Unknown/Generic PHY
(fc4b1)
eTSEC0, eTSEC1,
eTSEC2
Hit any key to stop autoboot:
0
UBoot=> md
f8000010
f8000000: 27052705 d402d402 49114911 00740074
'.'.....I.I..t.t
f8000010: 00000000 00000000 37493749 05070507
........7I7I....
f8000020: 65716571 73007300 00000000 00000000 eqeqs.s.........
Thanks for any help Pieter
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