[U-Boot] [PATCH 3/3] Add W90P1board based on W90P710 ARM SoC

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Mon Feb 9 14:11:51 CET 2009


On 13:13 Mon 09 Feb     , Vovk Konstantin wrote:
> W90P1 board support NAND and NOR Flash, IDE interface,
> optional LED for visualization. Changed makefile
> in /examples folder for support W90P710 SoC.
> ---
>   MAINTAINERS                 |   13 ++-
>   MAKEALL                     |    1 +
>   Makefile                    |    3 +
>   board/w90p1/Makefile        |   53 ++++++++++
>   board/w90p1/config.mk       |   24 +++++
>   board/w90p1/ide.c           |  120 +++++++++++++++++++++
>   board/w90p1/led.c           |   61 +++++++++++
>   board/w90p1/lowlevel_init.S |  124 ++++++++++++++++++++++
>   board/w90p1/nand.c          |  106 +++++++++++++++++++
>   board/w90p1/u-boot.lds      |   69 ++++++++++++
>   board/w90p1/w90p1.c         |   95 +++++++++++++++++
>   examples/Makefile           |    8 +-
>   include/configs/W90P1.h     |  240 +++++++++++++++++++++++++++++++++++++++++++
>   13 files changed, 908 insertions(+), 9 deletions(-)
>   create mode 100644 board/w90p1/Makefile
>   create mode 100644 board/w90p1/config.mk
>   create mode 100644 board/w90p1/ide.c
>   create mode 100644 board/w90p1/led.c
>   create mode 100644 board/w90p1/lowlevel_init.S
>   create mode 100644 board/w90p1/nand.c
>   create mode 100644 board/w90p1/u-boot.lds
>   create mode 100644 board/w90p1/w90p1.c
>   create mode 100644 include/configs/W90P1.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 38feac8..95b59dc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -62,7 +62,7 @@ Joe D'Abbraccio <ljd015 at freescale.com>
> 
>   	MPC837xERDB	MPC837x
> 
> -K?ri Dav??sson <kd at flaga.is>
> +K???ri Dav??????sson <kd at flaga.is>
??

> 
>   	FLAGADM		MPC823
> 
> @@ -516,7 +516,7 @@ Peter Figuli <peposh at etc.sk>
> 
>   	wepep250	xscale
> 
> -Marius Gr?ger <mag at sysgo.de>
> +Marius Gr???ger <mag at sysgo.de>
??
> 
>   	impa7		ARM720T (EP7211)
>   	ep7312		ARM720T (EP7312)
> @@ -566,7 +566,7 @@ Nishanth Menon <nm at ti.com>
> 
>   	omap3_zoom1	ARM CORTEX-A8 (OMAP3xx SoC)
> 
> -David M?ller <d.mueller at elsoft.ch>
> +David M???ller <d.mueller at elsoft.ch>
??
> 
>   	smdk2410	ARM920T
>   	VCMA9		ARM920T
> @@ -646,7 +646,7 @@ Richard Woodruff <r-woodruff2 at ti.com>
> 
>   	omap2420h4	ARM1136EJS
> 
> -Alex Z?pke <azu at sysgo.de>
> +Alex Z???pke <azu at sysgo.de>
??
> 
>   	lart		SA1100
>   	dnp1110		SA1110
> @@ -655,6 +655,9 @@ Sergey Lapin <slapin at ossfans.org>
> 
>   	afeb9260	ARM926EJS (AT91SAM9260 SoC)
> 
> +Konstantin Vovk <ksl at kslemb.com>
> +	w90p1		ARM720T (W90P710 SoC)
> +
>   -------------------------------------------------------------------------
> 
>   Unknown / orphaned boards:
> @@ -671,7 +674,7 @@ Unknown / orphaned boards:
>   #	Board		CPU						#
>   #########################################################################
> 
> -Daniel Engstr?m <daniel at omicron.se>
> +Daniel Engstr???m <daniel at omicron.se>
??
> 
>   	sc520_cdp	x86
> 
> diff --git a/MAKEALL b/MAKEALL
> index cf05133..02b8595 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -481,6 +481,7 @@ LIST_ARM7="		\
>   	lpc2292sodimm	\
>   	modnet50	\
>   	SMN42		\
> +	w90p1		\
>   "
> 
>   #########################################################################
> diff --git a/Makefile b/Makefile
> index 787c5f2..bbc62bb 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2916,6 +2916,9 @@ lpc2292sodimm_config:	unconfig
>   SMN42_config	:	unconfig
>   	@$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
> 
> +W90P1_config	:	unconfig
> +	@$(MKCONFIG) $(@:_config=) arm arm720t w90p1
> +
>   #########################################################################
>   ## ARM CORTEX Systems
>   #########################################################################
> diff --git a/board/w90p1/Makefile b/board/w90p1/Makefile
> new file mode 100644
> index 0000000..d4d1cba
> --- /dev/null
> +++ b/board/w90p1/Makefile
> @@ -0,0 +1,53 @@
> +
> +#
> +# (C) Copyright 2000-2008
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).a
> +
> +COBJS-y := $(BOARD).o
> +COBJS-$(CONFIG_CMD_NAND)   += nand.o
please use tab
> +COBJS-$(CONFIG_CMD_IDE)    += ide.o
please use tab
> +COBJS-$(CONFIG_STATUS_LED) += led.o
> +
> +SOBJS := lowlevel_init.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS-y))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> +	rm -f $(SOBJS) $(OBJS)
> +
> +distclean:	clean
> +	rm -f $(LIB) core *.bak .depend
> +
> +#########################################################################
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +#########################################################################
> diff --git a/board/w90p1/config.mk b/board/w90p1/config.mk
> new file mode 100644
> index 0000000..34f8978
> --- /dev/null
> +++ b/board/w90p1/config.mk
> @@ -0,0 +1,24 @@
> +#
> +# (C) Copyright 2000-2004
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +TEXT_BASE = 0x01FC0000
> diff --git a/board/w90p1/ide.c b/board/w90p1/ide.c
> new file mode 100644
> index 0000000..0c370b5
> --- /dev/null
> +++ b/board/w90p1/ide.c
> @@ -0,0 +1,120 @@
> +/*
> + * (C) Copyright 2008
> + * KSL Embedded Development Team <www.kslemb.com>
> + * Konstantin Vovk <ksl at kslemb.com>
> + *
> + * IDE interface for Winbond W90P710 ARM7 SoC
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + */
> +#include <common.h>
> +#include <asm/hardware.h>
> +
> +#if defined(CONFIG_CMD_IDE)
> +#include <ata.h>
> +#include <ide.h>
> +
> +/*
> + * Define the start address of the IDE_CS0 region (0x73000000 but we wr/rd to
> + * the 0xF3000000 for disable internal cache memory MSB=1)
> + * Start Address for IDE CS0 - mapped to the EBI ECS1
> + */
> +#define EXT1_BASE	0xF3000000
> +/* Define the start address of the IDE_CS1 region (0x74000000 but we wr/rd to
> + * the 0xF4000000 for disable internal cache memory MSB=1)
> + * Start Address for IDE CS1 - mapped to the EBI ECS2
> + */
> +#define EXT2_BASE	0xF4000000
> +
> +/* Config bits for ECS1 and ECS2 */
> +
> +#define SIZE_256k	(0 << 16)	/* Memory size is 256K */
> +#define SIZE_512k	(1 << 16)	/* Memory size is 512K */
> +#define SIZE_1M		(2 << 16)	/* Memory size is 1M   */
> +#define SIZE_16M	(6 << 16)	/* Memory size is 16M  */
> +#define SIZE_32M	(7 << 16)	/* Memory size is 32M  */
> +
> +#define ADRS		(1 << 15)
> +#define tACC		(15 << 11)	/* Access cycles of external I/O bank */
> +#define tCOH		(7 << 8)	/* Chip selection hold time */
> +#define tACS		(7 << 5)	/* Address set-up before nECS */
> +#define tCOS		(7 << 2)	/* Chip selection setup time */
please use upppercase
please move this to the header
> +
> +#define BUS16		(2)		/* 16-bit bus width for IDE */
> +#define BUS08		(1)		/* 8-bit bus width for IDE  */
> +
> +#define BUS_SETTINGS	(SIZE_256k | ADRS | tACC | tCOH | tACS | tCOS)
> +#define BUS_16BIT	(BUS_SETTINGS |	BUS16)
> +#define BUS_8BIT	(BUS_SETTINGS |	BUS08)
> +
> +/* IDE_CS0 with 16bit data bus */
> +#define ENABLE16()   PUT_REG(REG_EXT1CON, ((EXT1_BASE << 1) | BUS_16BIT))
> +/* IDE_CS0 with 8bit data bus */
> +#define DISABLE16()  PUT_REG(REG_EXT1CON, ((EXT1_BASE << 1) | BUS_8BIT))
> +
> +void outb (unsigned char val, volatile unsigned char *addr)
> +{
> + 	*(addr) = val;
> +}
> +
> +unsigned char inb (volatile unsigned char *addr)
> +{
> + 	volatile unsigned char c;
> +
> + 	c = *(addr);
> + 	return c;
> +}
please use the asm version of it
> +
> +/*  IDE work with Data Port via 16-bit BUS that's why we must first of all
> + *  enable 16-bit bus on ECS1, read/write data to the Data Port, and finaly
> + *  disable 16-bit wide data bus
> + */
> +void insw (unsigned short *addr, unsigned short *sect_buf, int words)
> +{
> +	int i;
> +
> +	ENABLE16 ();
> +	for (i = 0; i < words; i++)
> +		*(sect_buf + i) = *(addr);
> +	DISABLE16 ();
> +}
> +
> +void outsw (unsigned short *addr, unsigned short *sect_buf, int words)
> +{
> +	int i;
> +
> +	ENABLE16 ();
> +	for (i = 0; i < words; i++)
> +		*(addr) = *(sect_buf + i);
> +	DISABLE16 ();
> +}
ditto
> +
> +int ide_preinit (void)
> +{
> +	/* Init IDE_CS0 with 8bit data bus */
> +	PUT_REG (REG_EXT1CON, ((EXT1_BASE << 1) | BUS_8BIT));
> +	/* Init IDE_CS1 with 8bit data bus */
> +	PUT_REG (REG_EXT2CON, ((EXT2_BASE << 1) | BUS_8BIT));
> +	/* Enable nWE as a write strob for ECS1 and ECS2 */
> +	PUT_REG (REG_EBICON, GET_REG(REG_EBICON) | (1 << 25) | (1 << 26));
> +
> +	return 0;
> +}
> +#endif

> diff --git a/board/w90p1/lowlevel_init.S b/board/w90p1/lowlevel_init.S
> new file mode 100644
> index 0000000..83c40a3
> --- /dev/null
> +++ b/board/w90p1/lowlevel_init.S
> @@ -0,0 +1,124 @@
> +/*
> + * (C) Copyright 2008
> + * KSL Embedded Development Team <www.kslemb.com>
> + * Konstantin Vovk <ksl at kslemb.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <version.h>
> +#include <asm/hardware.h>
> +
> +/*
> + * Configure Memory Map
> + *
> + * This memory map allows us to relocate from FLASH to SRAM.  After
> + * power-on reset the CPU only knows about the FLASH memory at address
> + * 0x00000000.	After lowlevel_init completes the memory map will be:
> + *
> + * Memory Addr
> + * 0x00000000 to 0x02000000 - 32MB on board SDRAM via DD6 and DD7
> + * 0x7F000000 to 0x7F200000 - 2MB(16Bit) on board Flash M29W320ET via DD8
> + *
> + * Load all 6 memory registers with the STMIA instruction since
> + * memory access is disabled once these registers are written.
> + * The last register written re-enables memory access.
> + */
> +
> +/* Clock Skew Control register  */
> +#define	CKSKEW	0xFFF01F00
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +
> +	/* Check version number of W90P710 to set the clock skew
> +	 * The clock skew of W90P710 ver A = 0x7A
> +	 * The clock skew of W90P710 ver B = 0x39
> +	 */
> +	LDR	r0, =REG_PDID
please do not use uppercase for ldr and ands
> +	LDR	r0, [r0]
> +	LDR	r1, =0x0F000000
> +	ANDS	r0,r0,r1
> +	BEQ	ver0
> +	LDR	r1, =0x01000000
> +	CMP	r0, r1
> +	BEQ	ver1
> +	B	unknow_version
> +ver0:
> +	LDR	r0, =0x0FF007A
> +	B	skew_update
> +ver1:
> +	LDR	r0, =0x0FF0039
> +skew_update:
> +	LDR	r1, =CKSKEW
> +	STR	r0,[r1]
> +unknow_version:
> +	/* Nothing to do */
> +

> diff --git a/board/w90p1/nand.c b/board/w90p1/nand.c
> new file mode 100644
> index 0000000..ea36123
> --- /dev/null
> +++ b/board/w90p1/nand.c
> @@ -0,0 +1,106 @@
> +/*
> + * (C) Copyright 2008
> + * KSL Embedded Development Team <www.kslemb.com>
> + * Konstantin Vovk <ksl at kslemb.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> +
> +     Date     Version               Description
> +  16.01.2009   v1.1      Updated  w90p710_nand_hwcontrol function.
> +                         for support new U-Boot 2009
> + */
> +#include <asm/io.h>
> +#include <common.h>
> +#include <asm/hardware.h>
> +
> +#if defined(CONFIG_CMD_NAND)
> +#include <nand.h>
> +
> +/* W90P710 EBI Config bits */
> +#define	SIZE_256k	(0 << 16)	/* Memory size is 256K */
> +#define	SIZE_512k	(1 << 16)	/* Memory size is 512K */
> +#define	SIZE_1M		(2 << 16)	/* Memory size is 1M  */
> +#define	SIZE_16M	(6 << 16)	/* Memory size is 16M */
> +#define	SIZE_32M	(7 << 16)	/* Memory size is 32M */
> +
> +#define	ADRS		(1 << 15)	/* Bus alignment to the byte address */
> +#define	tACC		(7 << 11)	/* Access cycles of external I/O bank */
> +#define	tCOH		(7 << 8)	/* Chip selection hold time */
> +#define	tACS		(7 << 5)	/* Address set-up before nECS */
> +#define	tCOS		(7 << 2)	/* Chip selection setup time */
> +#define	BUS08		(1)		/* Bus is 8 bit wide */
please move to header
> +
> +#define BUS_SETTINGS	(SIZE_16M | ADRS | tACC | tCOH | tACS | tCOS | BUS08)
> +/*
> + * Define the start address of the CS0 region (0x72000000 but we wr/rd to the
> + * 0xF2000000 for disable internal cache memory)
> + */
> +#define	EXT0_BASE	0xF2000000
> +
> +/* Hardware specific access to control-lines */
> +void w90p710_nand_hwcontrol (struct mtd_info *mtd, int cmd, unsigned int ctrl)
> +{
> +	struct nand_chip *this = mtd->priv;
> +	ulong base = (ulong) this->IO_ADDR_W;
> +
> +	if (ctrl & NAND_CTRL_CHANGE) {
> +		if (ctrl & NAND_CLE)
> +			base = (base | W90P710_NAND_CLE);
> +		else
> +			base = (base & ~W90P710_NAND_CLE);
> +		if (ctrl & NAND_ALE)
> +			base = (base | W90P710_NAND_ALE);
> +		else
> +			base = (base & ~W90P710_NAND_ALE);
> +
> +		this->IO_ADDR_W = (void __iomem *) ( base );
> +	}
> +
> +	this->IO_ADDR_R = this->IO_ADDR_W;
> +
> +	if (cmd != NAND_CMD_NONE)
> +		writeb (cmd, this->IO_ADDR_W);
> +}
> +
> +/* We use nWait pin that's why we don't think abot ready */
> +int w90p710_nand_ready(struct mtd_info *mtd)
> +{
> +	return (1);
please use return x not return (x)
> +}
> +


> +DECLARE_GLOBAL_DATA_PTR;
> +#define MACH_W90X700 1861
please do not add it use the mach file
> +/*
> + * Miscelaneous platform dependent initialisations
> + */
> +int board_init (void)
> +{
> +	/* arch number MACH_TYPE_W90P710 */
> +	gd->bd->bi_arch_number = MACH_W90X700;
> +
> +	/* location of boot parameters */
> +	gd->bd->bi_boot_params = 0x00000800;
> +
> +#ifdef CONFIG_STATUS_LED
> +	status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
> +#endif
> +	return (0);
> +}
> +
> +int dram_init (void)
> +{
> +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> +	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +
> +#if CONFIG_NR_DRAM_BANKS == 2
> +	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> +	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
> +#endif
is it not possible to detect it
> +
> +	return (0);
> +}
> +
> +#if defined(CONFIG_DRIVER_W90P710_ETH)
> +int board_eth_init (bd_t *bis)
> +{
> +	return W90P710_EMC_initialize (bis);
> +}
> +#endif
> +
> +#ifdef CONFIG_RESET_PHY_R
> +void reset_phy(void)
> +{
> +	PHY_Reset ();
> +}
> +#endif
> +
> +#ifdef CONFIG_MISC_INIT_R
> +/* miscellaneous platform dependent initialisations */
> +int misc_init_r (void)
> +{
> +#ifdef CONFIG_CMD_IDE
> +	extern int ide_preinit (void);
> +	/* Init ECS1 and ECS2 for working with memory mapped IDE */
> +	ide_preinit ();
> +#endif
> +	return (0);
> +}
> +#endif
> diff --git a/examples/Makefile b/examples/Makefile
> index 927010d..86636b5 100644
> --- a/examples/Makefile
> +++ b/examples/Makefile
> @@ -33,10 +33,10 @@ ifeq ($(ARCH),arm)
>   ifeq ($(BOARD),omap2420h4)
>   LOAD_ADDR = 0x80300000
>   else
> -ifeq ($(CPU),omap3)
> -LOAD_ADDR = 0x80300000
> -else
> -LOAD_ADDR = 0xc100000
> + ifeq ($(BOARD),w90p1)
> +  LOAD_ADDR = 0x00001000
> + else
> +  LOAD_ADDR = 0xc100000
nack please do not remove other laod addr
>   endif
>   endif
>   endif
> diff --git a/include/configs/W90P1.h b/include/configs/W90P1.h
> new file mode 100644
> index 0000000..6e218ae
> --- /dev/null
> +++ b/include/configs/W90P1.h
> @@ -0,0 +1,240 @@
> +/*
> + * (C) Copyright 2008
> + * KSL Embedded Development Team <www.kslemb.com>
> + * Konstantin Vovk <ksl at kslemb.com>
> + *
> + * Configuation settings for W90P1 board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * If we are developing, we might want to start u-boot from ram
> + * so we MUST NOT initialize critical regs like mem-timing ...
> + *
> + * #define CONFIG_SKIP_LOWLEVEL_INIT
> + */
> +
> +/*
> + * High Level Configuration Options
> + *
> + */
> +#define CONFIG_ARM7		1	/* This is a ARM7 CPU	 */
> +#define CONFIG_ARM_THUMB	1	/* this is an ARM7TDMI	 */
> +#define CONFIG_W90P710		1	/* it's a W90P710 chip	 */
> +#define CONFIG_W90P1		1	/* on an W90P1 Board	 */
> +
> +#define CONFIG_IDENT_STRING	"\nKSL uBoot port for W90P710 SoC v1.1"
> +
> +/*
> + * Size of malloc() pool
> + */
> +#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
> +#define CONFIG_SYS_GBL_DATA_SIZE	128
> +
> +/*
> + * Hardware drivers
> + */
> +#define CONFIG_DRIVER_W90P710_ETH	1
> +#define CONFIG_DRIVER_W90P710_UART	1
> +#define CONFIG_DRIVER_W90P710_FLASH	1
> +
> +/*
> + * select serial console configuration
> + */
> +#define CONFIG_SERIAL1		1	/* UART0 */
> +
> +/* allow to overwrite serial and ethaddr */
> +#define CONFIG_ENV_OVERWRITE
> +
> +#define CONFIG_BAUDRATE		115200
> +
> +/*
> + * BOOTP options
> + */
> +
> +#define CONFIG_BOOTP_SUBNETMASK
> +#define CONFIG_BOOTP_GATEWAY
> +#define CONFIG_BOOTP_HOSTNAME
> +#define CONFIG_BOOTP_BOOTPATH
> +#define CONFIG_BOOTP_BOOTFILESIZE
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +
> +/*
> + * Board miscellaneous initializations: Init ECS1 and ECS2 for work with IDE bus
> + */
> +#define CONFIG_MISC_INIT_R	1
> +
> +/* Enable NAND Flash support */
> +#define CONFIG_CMD_NAND		1
> +
> +/* Enable IDE support */
> +#define CONFIG_CMD_IDE		1
> +
> +/* Enable status LED */
> +#define CONFIG_STATUS_LED	1
> +
> +/* If board support NAND flash */
> +#if defined (CONFIG_CMD_NAND)
> +
> +#define NAND_MAX_CHIPS			1
> +#define CONFIG_SYS_MAX_NAND_DEVICE	1
> +#define W90P710_NAND_BASE		0xF2000000
is it exist multiple bank to use it?
> +#define W90P710_NAND_CLE		(1 << 20)	/* CLE Address line */
> +#define W90P710_NAND_ALE		(1 << 21)	/* ALE Address line */
> +/* Base Address of the memory mapped NAND flash interface */
> +#define CONFIG_SYS_NAND_BASE		W90P710_NAND_BASE
> +
> +#endif /* CONFIG_CMD_NAND */
> +
> +/* If board support IDE interface */
> +#if defined (CONFIG_CMD_IDE)
> +
> +#define CONFIG_DOS_PARTITION	1
> +
> +/* W90P710 memory mapped IDE/ATA stuff */
> +#undef  CONFIG_IDE_8xx_DIRECT	/* no pcmcia interface required */
> +#undef  CONFIG_IDE_LED		/* no led for ide supported     */
> +#undef  CONFIG_IDE_RESET	/* no reset for ide supported   */
> +
> +#define CONFIG_SYS_IDE_MAXBUS		1	/* max is 1 IDE bus */
> +/* max 1 drive per IDE bus */
> +#define CONFIG_SYS_IDE_MAXDEVICE	(CONFIG_SYS_IDE_MAXBUS * 1)
> +
> +/* W90P1 board implements work with Data and registers via ECS1*/
> +#define CONFIG_SYS_ATA_BASE_ADDR	0xF3000000
maybe use macro for ECS1 & co
> +#define CONFIG_SYS_ATA_IDE0_OFFSET	0x0000
> +#define CONFIG_SYS_ATA_DATA_OFFSET	0x0000		/* Offset for data I/O */
> +#define CONFIG_SYS_ATA_REG_OFFSET	0x0000		/* Offset for normal register accesses */
> +/* CONFIG_SYS_ATA_ALT_OFFSET is used for work with Control Block [CBR]
> + * registers with A0...A2 = 0x6,0x7
> + * uBoot used only 0x6 - Alter Status/Device Control register
> + * W90P1 board implements work with CBR via ECS2
> + */
> +/* Offset for alternate registers must be identical to (EXT2_BASE-EXT1_BASE) */
> +#define CONFIG_SYS_ATA_ALT_OFFSET	0x01000000	
> +
> +#endif /* CONFIG_CMD_IDE */
> +
> +/* If board support Status LED */
> +#if defined (CONFIG_STATUS_LED)
> +
> +#define CONFIG_BOARD_SPECIFIC_LED 1
> +
> +#define STATUS_LED_BIT		0x00000004		/* GPIO2 pin 60 */
> +#define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 4)	/* 250ms */
> +#define STATUS_LED_STATE	STATUS_LED_BLINKING
> +#define STATUS_LED_ACTIVE	0		/* LED on for bit is '0' */
> +#define STATUS_LED_BOOT		0		/* LED 0 used for boot status */
> +#define STATUS_LED_DIR		0xFFF83004	/* GPIO Direction register */
> +#define STATUS_LED_PORT		0xFFF83008	/* GPIO Data output register */
> +
> +#endif /* CONFIG_STATUS_LED */
> +
> +/* Enable Ping command */
> +#define CONFIG_CMD_PING
> +/* Enable one or more MAC's support */
> +#define CONFIG_NET_MULTI
> +
> +#define CONFIG_ETHADDR		00:40:95:36:35:33
> +#define CONFIG_NETMASK		255.255.255.0
> +#define CONFIG_IPADDR		192.168.0.84
> +#define CONFIG_SERVERIP		192.168.0.4
please remove network CONFIG_
> +
> +/* Enable PHY Reset after MAC Init */
> +/*#define CONFIG_RESET_PHY_R*/
> +
> +#define CONFIG_CMDLINE_EDITING	1	/* add command line history */
> +#define CONFIG_BOOTDELAY	2	/* delay for automatic boot */
> +/*#define CONFIG_SYS_AUTOLOAD	"no"*/	/*rarpb, bootp or dhcp commands will perform only*/
> +
> +#define CONFIG_LOADADDR		0x8000	/* default load address */
> +#define CONFIG_BOOTCOMMAND	"bootm 0x7F090000" /* Start uClinux from NOR Flash */
> +/*#define CONFIG_BOOTCOMMAND	"tftp 0x8000 uImage"*/
> +
> +#define CONFIG_BOOTARGS		"console=ttyS0,115200 root=/dev/hda1 rw"
> +
> +/*
> + * Miscellaneous configurable options
> + */
Best Regards,
J.


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