[U-Boot] [PATCH 30/42] Blackfin: bf526-ezbrd: new board port
Mike Frysinger
vapier at gentoo.org
Tue Feb 10 07:21:08 CET 2009
Signed-off-by: Mike Frysinger <vapier at gentoo.org>
---
MAINTAINERS | 1 +
MAKEALL | 1 +
Makefile | 6 +-
board/bf526-ezbrd/.gitignore | 1 +
board/bf526-ezbrd/Makefile | 58 ++++++++++++++
board/bf526-ezbrd/bf526-ezbrd.c | 109 +++++++++++++++++++++++++
board/bf526-ezbrd/config.mk | 32 ++++++++
board/bf526-ezbrd/spi_flash.c | 2 +
board/bf526-ezbrd/u-boot.lds.S | 124 +++++++++++++++++++++++++++++
include/configs/bf526-ezbrd.h | 166 +++++++++++++++++++++++++++++++++++++++
10 files changed, 497 insertions(+), 3 deletions(-)
create mode 100644 board/bf526-ezbrd/.gitignore
create mode 100644 board/bf526-ezbrd/Makefile
create mode 100644 board/bf526-ezbrd/bf526-ezbrd.c
create mode 100644 board/bf526-ezbrd/config.mk
create mode 100644 board/bf526-ezbrd/spi_flash.c
create mode 100644 board/bf526-ezbrd/u-boot.lds.S
create mode 100644 include/configs/bf526-ezbrd.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 1abdbd5..7acb22c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -845,6 +845,7 @@ Yusuke Goda <goda.yusuke at renesas.com>
Mike Frysinger <vapier at gentoo.org>
Blackfin Team <u-boot-devel at blackfin.uclinux.org>
+ BF526-EZBRD BF526
BF527-EZKIT BF527
BF533-EZKIT BF533
BF533-STAMP BF533
diff --git a/MAKEALL b/MAKEALL
index dada5a4..7862940 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -780,6 +780,7 @@ LIST_avr32=" \
#########################################################################
LIST_blackfin=" \
+ bf526-ezbrd \
bf527-ezkit \
bf533-ezkit \
bf533-stamp \
diff --git a/Makefile b/Makefile
index 9f7dd36..95945a9 100644
--- a/Makefile
+++ b/Makefile
@@ -3289,8 +3289,8 @@ suzaku_config: unconfig
#========================================================================
# Analog Devices boards
-BFIN_BOARDS = bf527-ezkit bf533-ezkit bf533-stamp bf537-stamp bf538f-ezkit \
- bf548-ezkit bf561-ezkit
+BFIN_BOARDS = bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp bf537-stamp \
+ bf538f-ezkit bf548-ezkit bf561-ezkit
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
@@ -3453,7 +3453,7 @@ clean:
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/{integratorap,integratorcp}/u-boot.lds \
- $(obj)board/{bf5{27,33,38f,48,61}-ezkit,bf5{33,37}-stamp}/u-boot.lds \
+ $(obj)board/bf5{26,27,33,37,38f,48,61}-{ez{kit,brd},stamp}/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
diff --git a/board/bf526-ezbrd/.gitignore b/board/bf526-ezbrd/.gitignore
new file mode 100644
index 0000000..945f324
--- /dev/null
+++ b/board/bf526-ezbrd/.gitignore
@@ -0,0 +1 @@
+/u-boot.lds
diff --git a/board/bf526-ezbrd/Makefile b/board/bf526-ezbrd/Makefile
new file mode 100644
index 0000000..9e667db
--- /dev/null
+++ b/board/bf526-ezbrd/Makefile
@@ -0,0 +1,58 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS-y := $(BOARD).o
+COBJS-$(CONFIG_CMD_EEPROM) += spi_flash.o
+
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+$(obj)u-boot.lds: u-boot.lds.S
+ $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c
new file mode 100644
index 0000000..26b6feb
--- /dev/null
+++ b/board/bf526-ezbrd/bf526-ezbrd.c
@@ -0,0 +1,109 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2005-2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+#include <net.h>
+#include <netdev.h>
+#include <asm/blackfin.h>
+#include <asm/net.h>
+#include <asm/mach-common/bits/otp.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ printf("Board: ADI BF526 EZ-Board board\n");
+ printf(" Support: http://blackfin.uclinux.org/\n");
+ return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+ gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
+ return gd->bd->bi_memsize;
+}
+
+#if defined(CONFIG_BFIN_MAC)
+void board_get_enetaddr(uchar *mac_addr)
+{
+ /* the MAC is stored in OTP memory page 0xDF */
+ uint32_t ret;
+ uint64_t otp_mac;
+
+ ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
+ if (!(ret & OTP_MASTER_ERROR)) {
+ uchar *otp_mac_p = (uchar *)&otp_mac;
+
+ for (ret = 0; ret < 6; ++ret)
+ mac_addr[ret] = otp_mac_p[5 - ret];
+
+ if (is_valid_ether_addr(mac_addr))
+ return;
+ }
+
+ puts("Warning: Generating 'random' MAC address\n");
+ bfin_gen_rand_mac(mac_addr);
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return bfin_EMAC_initialize(bis);
+}
+#endif
+
+#ifdef CONFIG_STATUS_LED
+#include <status_led.h>
+
+static void set_led_f(int pf, int state)
+{
+ switch (state) {
+ case STATUS_LED_OFF: bfin_write_PORTFIO_CLEAR(pf); break;
+ case STATUS_LED_BLINKING: bfin_write_PORTFIO_TOGGLE(pf); break;
+ case STATUS_LED_ON: bfin_write_PORTFIO_SET(pf); break;
+ }
+}
+static void set_led_g(int pf, int state)
+{
+ switch (state) {
+ case STATUS_LED_OFF: bfin_write_PORTGIO_CLEAR(pf); break;
+ case STATUS_LED_BLINKING: bfin_write_PORTGIO_TOGGLE(pf); break;
+ case STATUS_LED_ON: bfin_write_PORTGIO_SET(pf); break;
+ }
+}
+
+static void set_leds(led_id_t mask, int state)
+{
+ if (mask & 0x1) set_led_f(PF8, state);
+ if (mask & 0x2) set_led_g(PG11, state);
+ if (mask & 0x4) set_led_g(PG12, state);
+}
+
+void __led_init(led_id_t mask, int state)
+{
+ bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~(PF8));
+ bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~(PG11 | PG12));
+ bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() & ~(PF8));
+ bfin_write_PORTGIO_INEN(bfin_read_PORTGIO_INEN() & ~(PG11 | PG12));
+ bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | (PF8));
+ bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | (PG11 | PG12));
+}
+
+void __led_set(led_id_t mask, int state)
+{
+ set_leds(mask, state);
+}
+
+void __led_toggle(led_id_t mask)
+{
+ set_leds(mask, STATUS_LED_BLINKING);
+}
+
+#endif
diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk
new file mode 100644
index 0000000..f4a5a80
--- /dev/null
+++ b/board/bf526-ezbrd/config.mk
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# This is not actually used for Blackfin boards so do not change it
+#TEXT_BASE = do-not-use-me
+
+LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
+
+# Set some default LDR flags based on boot mode.
+LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))
diff --git a/board/bf526-ezbrd/spi_flash.c b/board/bf526-ezbrd/spi_flash.c
new file mode 100644
index 0000000..8784741
--- /dev/null
+++ b/board/bf526-ezbrd/spi_flash.c
@@ -0,0 +1,2 @@
+/* Share the spi flash code */
+#include "../bf537-stamp/spi_flash.c"
diff --git a/board/bf526-ezbrd/u-boot.lds.S b/board/bf526-ezbrd/u-boot.lds.S
new file mode 100644
index 0000000..3e8be35
--- /dev/null
+++ b/board/bf526-ezbrd/u-boot.lds.S
@@ -0,0 +1,124 @@
+/*
+ * U-boot - u-boot.lds.S
+ *
+ * Copyright (c) 2005-2008 Analog Device Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <asm/blackfin.h>
+#undef ALIGN
+#undef ENTRY
+#undef bfin
+
+/* If we don't actually load anything into L1 data, this will avoid
+ * a syntax error. If we do actually load something into L1 data,
+ * we'll get a linker memory load error (which is what we'd want).
+ * This is here in the first place so we can quickly test building
+ * for different CPU's which may lack non-cache L1 data.
+ */
+#ifndef L1_DATA_B_SRAM
+# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
+# define L1_DATA_B_SRAM_SIZE 0
+#endif
+
+OUTPUT_ARCH(bfin)
+
+MEMORY
+{
+ ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
+ l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
+ l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
+}
+
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ cpu/blackfin/start.o (.text .text.*)
+ __initcode_start = .;
+ cpu/blackfin/initcode.o (.text .text.*)
+ __initcode_end = .;
+ *(.text .text.*)
+ } >ram
+
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata .rodata.*)
+ *(.rodata1)
+ *(.eh_frame)
+ . = ALIGN(4);
+ } >ram
+
+ .data :
+ {
+ . = ALIGN(256);
+ *(.data .data.*)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ } >ram
+
+ .u_boot_cmd :
+ {
+ ___u_boot_cmd_start = .;
+ *(.u_boot_cmd)
+ ___u_boot_cmd_end = .;
+ } >ram
+
+ .text_l1 :
+ {
+ . = ALIGN(4);
+ __stext_l1 = .;
+ *(.l1.text)
+ . = ALIGN(4);
+ __etext_l1 = .;
+ } >l1_code AT>ram
+ __stext_l1_lma = LOADADDR(.text_l1);
+
+ .data_l1 :
+ {
+ . = ALIGN(4);
+ __sdata_l1 = .;
+ *(.l1.data)
+ *(.l1.bss)
+ . = ALIGN(4);
+ __edata_l1 = .;
+ } >l1_data AT>ram
+ __sdata_l1_lma = LOADADDR(.data_l1);
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss .bss.*)
+ *(COMMON)
+ __bss_end = .;
+ } >ram
+}
diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h
new file mode 100644
index 0000000..ddde6bd
--- /dev/null
+++ b/include/configs/bf526-ezbrd.h
@@ -0,0 +1,166 @@
+/*
+ * U-boot - Configuration file for BF526 EZBrd board
+ */
+
+#ifndef __CONFIG_BF526_EZBRD_H__
+#define __CONFIG_BF526_EZBRD_H__
+
+#include <asm/blackfin-config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf526-0.0
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
+
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 16
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 5
+
+
+/*
+ * Memory Settings
+ */
+/* This board has a 64meg MT48H32M16 */
+#define CONFIG_MEM_ADD_WDTH 10
+#define CONFIG_MEM_SIZE 64
+
+#define CONFIG_EBIU_SDRRC_VAL 0x0267
+#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS)
+
+#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
+#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
+
+#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
+
+
+/*
+ * NAND Settings
+ * (can't be used sametime as ethernet)
+ */
+/* #define CONFIG_BFIN_NFC */
+#ifdef CONFIG_BFIN_NFC
+#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
+#define CONFIG_DRIVER_NAND_BFIN
+#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_CMD_NAND
+#endif
+
+
+/*
+ * Network Settings
+ */
+#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
+ !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
+#define ADI_CMDS_NETWORK 1
+#define CONFIG_BFIN_MAC
+#define CONFIG_RMII
+#define CONFIG_NETCONSOLE 1
+#define CONFIG_NET_MULTI 1
+#endif
+#define CONFIG_HOSTNAME bf526-ezbrd
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_SYS_FLASH_BASE 0x20000000
+#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
+#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max number of sectors on one chip */
+
+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
+#define CONFIG_ENV_IS_IN_EEPROM 1
+#define CONFIG_ENV_OFFSET 0x4000
+#else
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR 0x20004000
+#define CONFIG_ENV_OFFSET 0x4000
+#endif
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x2000 /* Total Size of Environment Sector */
+#define ENV_IS_EMBEDDED_CUSTOM
+
+/* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */
+/* Values can range from 2-65535 */
+/* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */
+#define CONFIG_SPI
+#define CONFIG_SPI_BAUD 2
+#define CONFIG_SYS_I2C_FRAM
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C 1
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C_SLAVE 0
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE 1
+
+/* define to enable run status via led */
+/* #define CONFIG_STATUS_LED */
+#ifdef CONFIG_STATUS_LED
+#define CONFIG_BOARD_SPECIFIC_LED
+#ifndef __ASSEMBLY__
+typedef unsigned int led_id_t;
+void __led_init(led_id_t mask, int state);
+void __led_set(led_id_t mask, int state);
+void __led_toggle(led_id_t mask);
+#endif
+/* use LED0 to indicate booting/alive */
+#define STATUS_LED_BOOT 0
+#define STATUS_LED_BIT 1
+#define STATUS_LED_STATE STATUS_LED_ON
+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4)
+/* use LED1 to indicate crash */
+#define STATUS_LED_CRASH 1
+#define STATUS_LED_BIT1 2
+#define STATUS_LED_STATE1 STATUS_LED_ON
+#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
+#endif
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+#include <asm/blackfin-config-post.h>
+
+#endif
--
1.6.1.2
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