[U-Boot] [PATCH 08/12] 83xx, kmeter: QE_ENET10 errata for Silicon Revision 2.1

[Heiko Schocher]

old code implemented the QE_ENET10 errata only for Silicon
Revision 2.0. New code reads now the Silicon Revision
register and sets dependend on the Silicon Revision the
values as advised in the QE_ENET10 errata.

Also added missing get_svr() in cpu/mpc83xx/start.S to
read the Silicon Revision register.

Signed-off-by: Heiko Schocher <hs at denx.de>
---
 board/keymile/kmeter1/kmeter1.c |   20 ++++++++++++--------
 cpu/mpc83xx/start.S             |    5 +++++
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/board/keymile/kmeter1/kmeter1.c b/board/keymile/kmeter1/kmeter1.c
index 0b0c2a3..0f4217a 100644
--- a/board/keymile/kmeter1/kmeter1.c
+++ b/board/keymile/kmeter1/kmeter1.c
@@ -80,19 +80,23 @@ static int board_init_i2c_busses (void)

 int board_early_init_r (void)
 {
-	void *reg = (void *)(CONFIG_SYS_IMMR + 0x14a8);
-	u32 val;
+	unsigned short	svid;

+	svid = (unsigned short) get_svr ();
 	/*
 	 * Because of errata in the UCCs, we have to write to the reserved
 	 * registers to slow the clocks down.
 	 */
-	val = in_be32 (reg);
-	/* UCC1 */
-	val |= 0x00003000;
-	/* UCC2 */
-	val |= 0x0c000000;
-	out_be32 (reg, val);
+	switch (svid) {
+		case 0x0020:
+			setbits_be32((void *)(CONFIG_SYS_IMMR + 0x14a8),
+					0x0c003000);
+			break;
+		case 0x0021:
+			clrsetbits_be32((void *)(CONFIG_SYS_IMMR + 0x14ac),
+					0x00000050, 0x000000a0);
+			break;
+	}
 	/* enable the PHY on the PIGGY */
 	setbits (8, (void *)(CONFIG_SYS_PIGGY_BASE + 0x10003), 0x01);

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 26e3106..8ef5368 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -137,6 +137,11 @@ get_pvr:
 	mfspr	r3, PVR
 	blr

+	.globl get_svr
+get_svr:
+	mfspr	r3, SVR
+	blr
+
 	.globl	ppcDWstore
 ppcDWstore:
 	lfd	1, 0(r4)
-- 
1.6.0.6

-- 
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany