[U-Boot] [PATCH] 83xx: Fix some bugs in spd sdram code
Joakim Tjernlund
Joakim.Tjernlund at transmode.se
Wed Feb 25 09:40:50 CET 2009
>
> 1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
> tRTP according to DDR2 JEDEC spec.
> 2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
> 3. add the support of DDR2-533,667,800 DIMMs
> 4. cpo
> 5. make the AL to min to gain better performance.
>
> The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
> MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.
>
> Reported-by: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
> Signed-off-by: Dave Liu <daveliu at freescale.com>
1, 2 and 5
Acked-by: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
Don't understand cpo and haven't looked at 3 so
I can't say anything useful.
Jocke
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