[U-Boot] NAND bad environment block handling

Frans Meulenbroeks fransmeulenbroeks at yahoo.com
Fri Jan 9 08:25:15 CET 2009


Sylvain, Scott,

Thanks for the info.
If the bad env blocks are skipped that at least would solve my problem.
I hope that it does not break fw_setenv. 
Storing the pointer in oob in block 0 is an interesting idea. I need to think about the impact on that one a little bit more.

With large blocks definitely the waste is big. Ideal solution would be that the hw does bad block mapping. Somewhat less ideal would be to position partitions dynamically  and specify the mtd partition start points at the kernel cmd line. Issue is that this is complicates the software upgrade. Even less ideal but common practice today seems to be to reserve slack room for every partition (or even worse, ignore the problem and assume perfect NAND)

Best regards, Frans


--- On Thu, 1/8/09, Cote, Sylvain <Sylvain.Cote at verint.com> wrote:

> From: Cote, Sylvain <Sylvain.Cote at verint.com>
> Subject: RE: [U-Boot] NAND bad environment block handling
> To: fransmeulenbroeks at yahoo.com, u-boot at lists.denx.de
> Date: Thursday, January 8, 2009, 5:06 PM
> My understanding is that u-boot already support bad block
> for the environment config.   When reading or writing the
> config from/to the nand, u-boot skip bad block.  However,
> you need to reserve some spare blocks in nand for
> environment config.  This is done in u-boot-nand.lds:
> 
> /* Align to next NAND block.  The NAND has block of 128K
> ==> 0x20000*/
>     . = ALIGN(0x20000);
>     common/environment.o  (.ppcenv)
>     /* Keep some space here for redundant env and potential
> bad env blocks */
>     . = ALIGN(0x80000);
> 
> 
> Regards 
> 
> Sylvain Côté
> 
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Frans
> Meulenbroeks
> Sent: Thursday, January 08, 2009 10:19 AM
> To: u-boot at lists.denx.de
> Subject: [U-Boot] NAND bad environment block handling
> 
> Hi,
> 
> I'm wondering what the best way is to handle bad
> environment blocks in NAND.
> 
> According to the spec of our supplier a delivered component
> is considered to be OK if less than 2% of the blocks are not
> bad.
> This means that for our products we need to take into
> account that worst case 2% of the blocks are bad. But even
> with 1% bad blocks we have an issue:
> If the bad blocks are distributed randomly we have a chance
> of 1/100 * 1/100 so 1 out of 10.000 that both U-Boot
> environment blocks are bad. 
> And actually things could even be worse if the bad blocks
> are caused by some manufacturing defect at our supplier and
> both environment blocks happen to be bad in a whole batch of
> ICs.
> 
> Is there a solution for this?
> (obviously I am not considering the situation for a single
> system, where I just would relocate the environment block;
> this concerns a production situation).
> 
> E.g. it would be nice if U-Boot could read the env from the
> next non-bad block at/after the env address.
> 
> Has someone experience in this area? Ideas? Suggestions?
> 
> Thanks alot!
> Frans Meulenbroeks
> 
> 
>       
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