[U-Boot] [PATCH 1/2] Change DDR tlb start entry to CONFIG param for85xx

Kumar Gala galak at kernel.crashing.org
Wed Jan 14 06:25:52 CET 2009


On Jan 13, 2009, at 7:08 PM, Liu Dave wrote:

>> +#ifndef CONFIG_SYS_DDR_TLB_START
>> +#define CONFIG_SYS_DDR_TLB_START 8
>> +#endif
>> +
>> unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
>> {
>> 	unsigned int tlb_size;
>> @@ -137,7 +141,7 @@ unsigned int setup_ddr_tlbs(unsigned int
>> memsize_in_meg)
>> 	 * Configure DDR TLB1 entries.
>> 	 * Starting at TLB1 8, use no more than 8 TLB1 entries.
>> 	 */
>> -	ram_tlb_index = 8;
>> +	ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
>> 	ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
>> 	while (ram_tlb_address < (memsize_in_meg * 1024 * 1024)
>> 	      && ram_tlb_index < 16) {
>
> Kumar,
>
> is it possible to change TLB alloc way?
> current u-boot TLB is easy to conflict/confus to users.
> there are two limitations
> 1) the magic number 8 for DDR
> 2) the TLB14/TLB15 never can be used to board code.
>
> These are TLBs that board code can use just like
> 0,1....7,skip DDR(8....), skip 14 and 15.
>
> Basically it is limited to 0-7.

I'm not sure what you are asking about.  I agree we have some  
limitations but for the vast majority of boards 8 entries has been  
enough.

I'm all for any patches that try and make the allocation a bit more  
dynamic.  We can do something similar to the LAW code if someone wants  
to work up patches.

- k


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