[U-Boot] 460GT PCIe configuration

[vb]

On Wed, Jan 14, 2009 at 7:03 AM, Stefan Roese <sr at denx.de> wrote:
> On Tuesday 13 January 2009, vb wrote:
>
>> The CONFIG_SYS_PCIE0_XCFGBASE constant (and its counterparts for other
>> PCIe ports) is defined and used in the code, and gets a TLB entry
>> assigned, but I can't find a place where it is programmed into the CPU
>> - how does it know where this section is?!
>
> Again you seem to be correct here. I can't find a place where this area is
> programmed. I don't have the time to dig into this right now, so it would be
> great if you could work on this a little deeper. I suggest to look at the
> Linux 4xx PCI driver (arch/powerpc/sysdev/ppc4xx_pci.c) as reference.
>

Stefan,

thank you for confirming my suspicions and for your suggestion, I will
compare notes with the Linux version (should have thought about this
earlier). But I also was under impression that Linux does not touch
some parts of PCI configuration, as the memory map is set by u-boot
and used by Linux. Or does linux use the addresses from the device
tree to reprogram the PCIe subsystem?


>> I have several different targets with different PCIe components, but
>> all using the same base CPU subsystem design, and on some of them PCIe
>> components misbehave, namely, PCIe memory read transactions fail with
>> a machine check after a timeout, even though the PCIe side of things
>> is fine (when looking with a protocol analyzer).
>
> Is this all 460EX? Or some other 4xx? What are the PCIe endpoints you are
> using? Do you see the same problems on Canyonlands as well?
>

This is 460GT, so the eval board is glacier, not canyonlands.

The PCI endpoints which work are an Intel NIC (tried it with the
glacier), and some Broadcom integrated ethernet switches (those work
on our own design). The one which fails is based on the very similar
460GT based platform, but uses an Altera FPGA with a standard Altera
PCIe interface implementation.

What happens is that config space transactions (both read and write)
and memory writes work fine, but attempts to read Altera's memory
mapped space causes a machine check with very vague error reporting.

I will try submitting diffs for your review, but I need to get to the
bottom of this first...

cheers,
vadim

> Best regards,
> Stefan
>
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