[U-Boot] question about U-Boot's cpu/ppc4xx/44x_spd_ddr2.c

[Stefan Roese]

Hi Carolyn,

On Thursday 15 January 2009, carolyn.j.smith at tektronix.com wrote:
> I have a question about some of the code in U-Boot's
> cpu/ppc4xx/44x_spd_ddr2.c, in particular the program_codt function and
> these lines of code:
>
>         mfsdram(SDRAM_CODT, codt);
>         codt |= (SDRAM_CODT_IO_NMODE
>                  & (~SDRAM_CODT_DQS_SINGLE_END
>                     & ~SDRAM_CODT_CKSE_SINGLE_END
>                     & ~SDRAM_CODT_FEEBBACK_RCV_SINGLE_END
>                     & ~SDRAM_CODT_FEEBBACK_DRV_SINGLE_END));
>
> What is the intention of this code? As far as I can tell, all it is doing
> is or'ing SDRAM_CODT_IO_NMODE (= 0x00000001) into the codt variable and the
>
>                  & (~SDRAM_CODT_DQS_SINGLE_END
>                     & ~SDRAM_CODT_CKSE_SINGLE_END
>                     & ~SDRAM_CODT_FEEBBACK_RCV_SINGLE_END
>                     & ~SDRAM_CODT_FEEBBACK_DRV_SINGLE_END)
>
> part of it has no real effect.

Good catch.

> Was the intention to turn on the SDRAM_CODT_IO_NMODE bit and turn off the
> SDRAM_CODT_DQS_SINGLE_END, SDRAM_CODT_CKSE_SINGLE_END,
> SDRAM_CODT_FEEBBACK_RCV_SINGLE_END and SDRAM_CODT_FEEBBACK_DRV_SINGLE_END
> bits in which case the code should be something like this?
>
>         codt |= SDRAM_CODT_IO_NMODE;
>
>         codt &= ~(SDRAM_CODT_DQS_SINGLE_END | SDRAM_CODT_CKSE_SINGLE_END |
>                   SDRAM_CODT_FEEBBACK_RCV_SINGLE_END |
> SDRAM_CODT_FEEBBACK_DRV_SINGLE_END);

Not being the original author of this code, I can only guess that this is what 
this code *should* do. Please send a patch to fix this.

> Also the 460EX manual I have (revision 1.16 - November 17, 2008) shows bits
> 29 and 30 of the CODT register as Reserved (in which case they shouldn't be
> modified) while U-Boot has them as
>
> #define SDRAM_CODT_FEEBBACK_RCV_SINGLE_END      0x00000004
> #define SDRAM_CODT_FEEBBACK_DRV_SINGLE_END      0x00000002
>
> Do I have an out-of-date manual or are they reserved only for the 460EX and
> not for other processors using this code?

No, you seem to be correct here too. I couldn't find those defines in the 
460EX users manual (same version) or in the current 440SPe users manual.

Perhaps somebody from AMCC could jump in here. Adam? Any ideas on this?

Best regards,
Stefan

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