[U-Boot] [PATCH] V2 NAND_SPL support for phycore imx31 to Magnus Lilja

[Maxim Artamonov]

Goodday Magnus!

In message on Saturday 03 January 2009 03:49:53 Magnus Lilja wrote:
> Hi
> 
> I have used your patch to boot the i.MX31 PDK board from its large
> page NAND now. I had to modify one function (see below).
> 
> 
> 2008/12/5 Maxim Artamonov <scn1874 at yandex.ru>:
> > V2 NAND_SPL support for phycore imx31
> >
> > Changelog:
> >
> > * Added bad block verify and skip;
> > * Correct code to codestyle;
> > * Added few comments;
> > diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c
> > +static void mx31_nand_data_output(void)
> > +{
> > +       NFC_CONFIG1 = NFC_ECC_EN;
> > +       NFC_BUF_ADDR = 0; /* read in first 0 buffer*/
> > +       NFC_CONFIG2 = NFC_OUTPUT;
> > +       mx31_wait_ready();
> > +}
> 
> I suggest using the following function instead in order to support for
> small page and large page devices:
> 
> static void mx31_nand_data_output(void)
> {
> 	int i;
> 
> 	/*
> 	 * The NAND controller requires four output commands for
> 	 * large page devices.
> 	 */
> 	for (i = 0; i < (CFG_NAND_PAGE_SIZE / 512); i++) {
> 		NFC_CONFIG1 = NFC_ECC_EN;
> 		NFC_BUF_ADDR = i; /* read in i:th buffer */
> 		NFC_CONFIG2 = NFC_OUTPUT;
> 		mx31_wait_ready();
> 	}
> }
> 
Ok, I have'nt possibilities for check this, but I think you have checked this. I'll add you code.

> > +       mx31_nand_data_output ();/*fill the main buffer 0*/
> > +
> > +       if (mx31_nand_check_ecc ())
> > +               while (1){
> > +                       break;};        /*!!!!!*/
> 
> How about returning an error code and letting the nand_boot() function
> below just loop forever (or something) if this happens?
I'll add infinitive loop for this. Return code of error to ..?
 
> > +
> > +       p1 = (u32 *)MAIN_AREA0;
> > +       p2 = (u32 *)buf;
> > +
> > +       /*main copy loop from NAND-buffer to SDRAM memory*/
> > +       for (i=0; i < (CFG_NAND_PAGE_SIZE / 4); i++){
> > +               *p2 = *p1;
> > +               p1++;
> > +               p2++;
> > +       }
> > +
> > +       p1 = (u32 *)SPARE_AREA0;
> > +
> > +       /*it is hardware specific code for 8-bit 512kB NAND-flash spare area*/
> 
> I guess "512kB" should be just "512"?
> 
You are right. 512 B.

> > +       p1++;
> > +       a = *p1;
> > +       a = (a & 0x0000ff00) >> 8;
> > +
> 
> Is this code valid also for large page NAND devices? I don't know the
> answer myself.
> 
No, for 2-k paged Nand it would be better to write something like that:

       a = *p1;
       a = (a & 0x000000ff);

In addition, there is a difference between 8-bit and 16-bit modes.

> I hope you have the possibility to update the patch with the above as
> well as Scott's comments.
> 
I'll do.

with regards, Maxim