[U-Boot] [PATCH 1/5]P2020RDB Adds GPIO registers to MPC85xx Memory Map.

[Poonam Aggrwal]

Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
---
 include/asm-ppc/immap_85xx.h |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index db2bdf0..0efef05 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -341,6 +341,15 @@ typedef struct ccsr_pcix {
 	char	res11[476];
 } ccsr_pcix_t;
 
+typedef struct ccsr_gpio {
+	uint	gpdir;
+	uint	gpodr;
+	uint	gpdat;
+	uint	gpier;
+	uint	gpimr;
+	uint	gpicr;
+} ccsr_gpio_t;
+
 #define PCIX_COMMAND	0x62
 #define POWAR_EN	0x80000000
 #define POWAR_IO_READ	0x00080000
@@ -1648,6 +1657,8 @@ typedef struct ccsr_gur {
 #define CONFIG_SYS_MPC85xx_PCIX_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX_OFFSET)
 #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET	(0x9000)
 #define CONFIG_SYS_MPC85xx_PCIX2_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX2_OFFSET)
+#define CONFIG_SYS_MPC85xx_GPIO_OFFSET	(0xF000)
+#define CONFIG_SYS_MPC85xx_GPIO_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GPIO_OFFSET)
 #define CONFIG_SYS_MPC85xx_SATA1_OFFSET	(0x18000)
 #define CONFIG_SYS_MPC85xx_SATA1_ADDR	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SATA1_OFFSET)
 #define CONFIG_SYS_MPC85xx_SATA2_OFFSET	(0x19000)
-- 
1.5.6.3