[U-Boot] [PATCH 3/3 v4] arm: A320: Add support for Faraday A320 evaluation board

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Wed Jul 8 13:30:44 CEST 2009


On 15:14 Fri 03 Jul     , Po-Yu Chuang wrote:
> This patch adds support for A320 development board from Faraday. This board
> uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
> FA526 is an ARMv4 processor and uses the ARM920T source in this patch.
> 
as I understand correctly the faraday and the CS3518 share the same core and
IP so it will be better to have the same dir

cpu/arm920t/fa526/....
> Signed-off-by: Po-Yu Chuang <ratbert at faraday-tech.com>
> ---
>  MAINTAINERS                              |    4 +
>  MAKEALL                                  |    1 +
>  Makefile                                 |    7 +
>  board/faraday/a320/Makefile              |   51 +++++++
>  board/faraday/a320/a320.c                |   64 ++++++++
>  board/faraday/a320/config.mk             |   35 +++++
>  board/faraday/a320/lowlevel_init.S       |  191 ++++++++++++++++++++++++
>  cpu/arm920t/faraday/Makefile             |   46 ++++++
>  cpu/arm920t/faraday/ftsmc020.c           |   51 +++++++
>  cpu/arm920t/faraday/timer.c              |  195 +++++++++++++++++++++++++
>  include/asm-arm/arch-faraday/ftahbc020.h |   71 +++++++++
>  include/asm-arm/arch-faraday/ftpmu010.h  |  190 ++++++++++++++++++++++++
>  include/asm-arm/arch-faraday/ftsdmc020.h |  103 +++++++++++++
>  include/asm-arm/arch-faraday/ftsmc020.h  |   79 ++++++++++
>  include/asm-arm/arch-faraday/fttmr010.h  |   73 +++++++++
>  include/configs/a320.h                   |  235 ++++++++++++++++++++++++++++++
>  16 files changed, 1396 insertions(+), 0 deletions(-)
>  create mode 100644 board/faraday/a320/Makefile
>  create mode 100644 board/faraday/a320/a320.c
>  create mode 100644 board/faraday/a320/config.mk
>  create mode 100644 board/faraday/a320/lowlevel_init.S
>  create mode 100644 cpu/arm920t/faraday/Makefile
>  create mode 100644 cpu/arm920t/faraday/ftsmc020.c
>  create mode 100644 cpu/arm920t/faraday/timer.c
>  create mode 100644 include/asm-arm/arch-faraday/ftahbc020.h
>  create mode 100644 include/asm-arm/arch-faraday/ftpmu010.h
>  create mode 100644 include/asm-arm/arch-faraday/ftsdmc020.h
>  create mode 100644 include/asm-arm/arch-faraday/ftsmc020.h
>  create mode 100644 include/asm-arm/arch-faraday/fttmr010.h
>  create mode 100644 include/configs/a320.h
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b0e370f..ed41b3a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -680,6 +680,10 @@ Sergey Lapin <slapin at ossfans.org>
> 
>  	afeb9260	ARM926EJS (AT91SAM9260 SoC)
> 
> +Po-Yu Chuang <ratbert at faraday-tech.com>
> +
> +	a320		FA526 (ARMv4/reuse arm920t source) faraday SoC
> +
>  -------------------------------------------------------------------------
> 
>  Unknown / orphaned boards:
> diff --git a/MAKEALL b/MAKEALL
> index 027207d..530a253 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -498,6 +498,7 @@ LIST_ARM7="		\
>  #########################################################################
> 
>  LIST_ARM9="			\
> +	a320			\
>  	ap920t			\
>  	ap922_XA10		\
>  	ap926ejs		\
> diff --git a/Makefile b/Makefile
> index 0ae1d36..f99e9d4 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -2991,6 +2991,13 @@ B2_config	:	unconfig
>  	@$(MKCONFIG) $(@:_config=) arm s3c44b0 B2 dave
> 
>  #########################################################################
> +## Faraday A320 Systems
> +#########################################################################
> +
> +a320_config	:	unconfig
> +	@$(MKCONFIG) $(@:_config=) arm arm920t a320 faraday faraday
> +
> +#########################################################################
>  ## ARM720T Systems
>  #########################################################################
> 
> diff --git a/board/faraday/a320/Makefile b/board/faraday/a320/Makefile
> new file mode 100644
> index 0000000..ef053c2
> --- /dev/null
> +++ b/board/faraday/a320/Makefile
> @@ -0,0 +1,51 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).a
> +
> +COBJS	:= a320.o
> +SOBJS	:= lowlevel_init.o
> +
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> +	rm -f $(SOBJS) $(OBJS)
> +
> +distclean:	clean
> +	rm -f $(LIB) core *.bak $(obj).depend
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/faraday/a320/a320.c b/board/faraday/a320/a320.c
> new file mode 100644
> index 0000000..94517c9
> --- /dev/null
> +++ b/board/faraday/a320/a320.c
> @@ -0,0 +1,64 @@
> +/*
> + * (C) Copyright 2009 Faraday Technology
> + * Po-Yu Chuang <ratbert at faraday-tech.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#include <common.h>
> +#include <netdev.h>
> +#include <rtc.h>
> +#include <asm/io.h>
> +
> +#include <asm/arch/ftsmc020.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Miscellaneous platform dependent initialisations
> + */
> +
> +int board_init (void)
> +{
> +	gd->bd->bi_arch_number = MACH_TYPE_FARADAY;
no boot params?
> +
> +	ftsmc020_init ();	/* initialize Flash */
> +	rtc_reset ();		/* enable RTC */
do you really need this so early?
> +	return 0;
> +}
> +
> +int dram_init (void)
> +{
> +	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> +	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
> +
> +	return 0;
> +}
> +
> +int board_eth_init (bd_t *bd)
> +{
> +	return ftmac100_initialize (bd);
> +}
> +
> +ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
> +{
> +	if (banknum == 0) {	/* non-CFI boot flash */
> +		info->portwidth = FLASH_CFI_8BIT;
> +		info->chipwidth = FLASH_CFI_BY8;
> +		info->interface = FLASH_CFI_X8;
> +		return 1;
> +	} else
> +		return 0;
> +}
> diff --git a/board/faraday/a320/config.mk b/board/faraday/a320/config.mk
> new file mode 100644
> index 0000000..7573bbd
> --- /dev/null
> +++ b/board/faraday/a320/config.mk
> @@ -0,0 +1,35 @@
> +#
> +# (C) Copyright 2009 Faraday Technology
> +# Po-Yu Chuang <ratbert at faraday-tech.com>
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +# Faraday A320 board with FA526/FA626TE/ARM926EJ-S cpus
> +#
> +# see http://www.faraday-tech.com/ for more information
> +
> +# A320 has 1 bank of 64 MB DRAM (after remapped)
> +#
> +# 0000'0000 to 0400'0000
> +#
> +# Linux-Kernel is expected to be at 0000'8000, entry 0000'8000
> +#
> +# we load ourself to 03f8'0000
> +#
> +# download area is 0200'0000
> +
> +TEXT_BASE = 0x03f80000
> diff --git a/board/faraday/a320/lowlevel_init.S
> b/board/faraday/a320/lowlevel_init.S
> new file mode 100644
> index 0000000..4337740
> --- /dev/null
> +++ b/board/faraday/a320/lowlevel_init.S
> @@ -0,0 +1,191 @@
> +/*
> + * (C) Copyright 2009 Faraday Technology
> + * Po-Yu Chuang <ratbert at faraday-tech.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#include <config.h>
> +#include <version.h>
> +
> +#include <asm/macro.h>
> +#include <asm/arch/ftahbc020.h>
> +#include <asm/arch/ftsdmc020.h>
> +
> +/*
> + * Memory Mapping
> + */
> +#define ROM_DEFAULT_BASE	0x00000000
> +#define SDRAM_DEFAULT_BASE	0x10000000
this two are soc dependant so please please move it
> +#define SDRAM_REMAPPED_BASE	PHYS_SDRAM_1	/* remap location */
> +
> +/*
> + * parameters for the SDRAM controller
> + */
> +#define TP0_A		(CONFIG_SYS_SDMC_BASE + FTSDMC020_OFFSET_TP0)
> +#define TP1_A		(CONFIG_SYS_SDMC_BASE + FTSDMC020_OFFSET_TP1)
> +#define CR_A		(CONFIG_SYS_SDMC_BASE + FTSDMC020_OFFSET_CR)
> +#define B0_BSR_A	(CONFIG_SYS_SDMC_BASE + FTSDMC020_OFFSET_BANK0_BSR)
> +#define ACR_A		(CONFIG_SYS_SDMC_BASE + FTSDMC020_OFFSET_ACR)
> +
> +#define TP0_D		CONFIG_SYS_FTSDMC020_TP0
> +#define TP1_D		CONFIG_SYS_FTSDMC020_TP1
> +#define CR_D1		FTSDMC020_CR_IPREC
> +#define CR_D2		FTSDMC020_CR_ISMR
> +#define CR_D3		FTSDMC020_CR_IREF
> +
> +#define B0_BSR_D1	(CONFIG_SYS_FTSDMC020_BANK0_BSR | \
> +			FTSDMC020_BANK_BASE(SDRAM_DEFAULT_BASE))
> +#define B0_BSR_D2	(CONFIG_SYS_FTSDMC020_BANK0_BSR | \
> +			FTSDMC020_BANK_BASE(SDRAM_REMAPPED_BASE))
> +#define ACR_D		FTSDMC020_ACR_TOC(0x18)
> +
> +/*
> + * numeric 7 segment display
> + */
> +.macro	led, num
> +	write32	CONFIG_SYS_DEBUG_LED, \num
> +.endm
> +
> +/*
> + * Waiting for SDRAM to set up
> + */
> +.macro	wait_sdram
> +	ldr	r0, =CONFIG_SYS_SDMC_BASE
> +1:
> +	ldr	r1, [r0, #FTSDMC020_OFFSET_CR]
> +	cmp	r1, #0
> +	bne	1b
> +.endm
> +
> +.global reset_cpu
> +reset_cpu:
> +	b	reset_cpu
the reset_cpu is soc specific not board I guess
> +
> +.globl lowlevel_init
> +lowlevel_init:
> +	mov	r11, lr
> +
> +	led	0x0
> +
> +	/* if REMAP bit is set -> memory had been initialzed */
> +
> +	ldr	r0, =CONFIG_SYS_AHBC_BASE
> +	ldr	r1, [r0, #FTAHBC020_OFFSET_ICR]
> +	tst	r1, #FTAHBC020_ICR_REMAP		@ test REMAP bit
> +	bne	skip_remap
> +
> +	led	0x1
> +
> +	bl	init_sdmc
> +
> +	led	0x2
> +
> +	/*
> +	 * copy U-Boot to RAM
> +	 */
> +copy_code:
> +	ldr	r0, =ROM_DEFAULT_BASE	/* r0 <- source address     */
> +	ldr	r1, =SDRAM_DEFAULT_BASE	/* r1 <- target address     */
> +
> +	ldr	r2, .LC5
> +	ldr	r3, .LC6
> +	sub	r2, r3, r2		/* r2 <- size of armboot            */
> +	add	r2, r0, r2		/* r2 <- source end address         */
> +
> +	led	0x3
> +
> +copy_loop:
> +	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
> +	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
> +	cmp	r0, r2			/* until source end addreee [r2]    */
> +	ble	copy_loop
> +
I do not like to do this twice we need to find an otherway
do we really need to run in SDRAM before remap?
> +	led	0x4
> +
> +	bl	remap
> +
> +skip_remap:
> +	led	0x5
> +
> +	/* everything is fine now */
> +	mov	lr, r11
> +	mov	pc, lr
> +
> +.LC5:
> +	.word	_start
> +.LC6:
> +	.word	__bss_start
> +
> +/*
> + * memory initialization
> + */
> +init_sdmc:
> +	led	0x10
> +
> +	/* set SDRAM register */
> +
> +	write32	TP0_A, TP0_D
> +	led	0x11
> +
> +	write32	TP1_A, TP1_D
> +	led	0x12
> +
> +	/* set to precharge */
> +	write32	CR_A, CR_D1
> +	led	0x13
> +
> +	wait_sdram
> +	led	0x14
> +
> +	/* set mode register */
> +	write32	CR_A, CR_D2
> +	led	0x15
> +
> +	wait_sdram
> +	led	0x16
> +
> +	/* set to refresh */
> +	write32	CR_A, CR_D3
> +	led	0x17
> +
> +	wait_sdram
> +	led	0x18
> +
> +	write32	B0_BSR_A, B0_BSR_D1
> +	led	0x19
> +
> +	write32	ACR_A, ACR_D
> +	led	0x1a
> +
> +	mov	pc, lr
> +
> +/*
> + * This code will remap the memory ROM and SDRAM
> + * ROM will be placed on 0x80000000 SDRAM will jump to 0x0
> + */
> +remap:
> +	ldr	r0, =CONFIG_SYS_SDMC_BASE
> +
> +	/* first adjust sdram */
> +	write32	B0_BSR_A, B0_BSR_D2
> +
> +	/* then remap */
> +	ldr	r3, =CONFIG_SYS_AHBC_BASE
> +	ldr	r4, [r3, #FTAHBC020_OFFSET_ICR]
> +	orr	r4, r4, #FTAHBC020_ICR_REMAP		@ Set REMAP bit
> +	str	r4, [r3, #FTAHBC020_OFFSET_ICR]
> +
> +	mov	pc, lr
<snip>
> diff --git a/include/configs/a320.h b/include/configs/a320.h
> new file mode 100644
> index 0000000..daa17c4
> --- /dev/null
> +++ b/include/configs/a320.h
> @@ -0,0 +1,235 @@
> +/*
> + * (C) Copyright 2009 Faraday Technology
> + * Po-Yu Chuang <ratbert at faraday-tech.com>
> + *
> + * Configuation settings for the Faraday A320 board.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*-----------------------------------------------------------------------
> + * CPU and Board Configuration Options
> + */
> +#define CONFIG_A320		/* in a Faraday A320 SoC/Board   */
> +
> +#undef CONFIG_USE_IRQ		/* we don't need IRQ/FIQ stuff */
> +
> +#undef CONFIG_SKIP_LOWLEVEL_INIT
> +
> +/*-----------------------------------------------------------------------
> + * Timer
> + */
> +#define CONFIG_SYS_HZ		1000	/* timer ticks per second */
> +#define CONFIG_SYS_TIMERBASE	0x98400000
is it soc or board specific?
> +
> +/*-----------------------------------------------------------------------
> + * RTC
> + */
> +#define CONFIG_RTC_FTRTC010
> +#define CONFIG_SYS_RTC_BASE	0x98600000
is it soc or board specific?
> +
> +/*-----------------------------------------------------------------------
> + * Serial console configuration
> + */
> +
> +/* FTUART is a high speed NS 16C550A compatible UART */
> +#define CONFIG_BAUDRATE			38400
> +#define CONFIG_CONS_INDEX		1
> +#define CONFIG_SYS_NS16550
> +#define CONFIG_SYS_NS16550_SERIAL
> +#define CONFIG_SYS_NS16550_COM1		0x98200000
> +#define CONFIG_SYS_NS16550_REG_SIZE	-4
> +#define CONFIG_SYS_NS16550_CLK		18432000
> +
> +/* valid baudrates */
> +#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
> +
> +/*-----------------------------------------------------------------------
> + * Ethernet
> + */
> +#define CONFIG_NET_MULTI
> +#define CONFIG_DRIVER_FTMAC100
> +#define CONFIG_SYS_MAC100_BASE	0x90900000
> +
> +#define CONFIG_BOOTDELAY	3
> +
> +/*-----------------------------------------------------------------------
> + * Hardware register bases
> + */
> +#define CONFIG_SYS_AHBC_BASE	0x90100000	/* AHB Controller */
is it soc or board specific?
> +#define CONFIG_SYS_SMC_BASE	0x90200000	/* Static Memory Controller */
is it soc or board specific?
> +#define CONFIG_SYS_DEBUG_LED	0x902ffffc	/* Debug LED */
is it soc or board specific?
> +#define CONFIG_SYS_SDMC_BASE	0x90300000	/* SDRAM Controller */
is it soc or board specific?
> +
> +#define CONFIG_SYS_FTPMU_BASE	0x98100000	/* Power Management Unit */
is it soc or board specific?

Best Regards,
J.


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