[U-Boot] [PATCH 2/3 v2] 83xx: Add CONFIG_MEM_INIT_VALUE for boards with ECC
Peter Tyser
ptyser at xes-inc.com
Thu Jul 9 02:11:48 CEST 2009
Signed-off-by: Peter Tyser <ptyser at xes-inc.com>
---
cpu/mpc83xx/spd_sdram.c | 2 +-
include/configs/MPC8349EMDS.h | 1 +
include/configs/MPC8360EMDS.h | 1 +
include/configs/MPC8360ERDK.h | 1 +
include/configs/MPC837XEMDS.h | 1 +
include/configs/MPC837XERDB.h | 1 +
include/configs/TQM834x.h | 1 +
include/configs/kmeter1.h | 1 +
include/configs/sbc8349.h | 1 +
9 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 8a09a7d..ab6a2bb 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -834,7 +834,7 @@ void ddr_enable_ecc(unsigned int dram_size)
debug("\nInitializing ECC!\n");
- dma_meminit(0xdeadbeef, dram_size);
+ dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
debug("\nREADY!\n");
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index ea5fbff..35e6e84 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -76,6 +76,7 @@
*/
#define CONFIG_DDR_ECC /* support DDR ECC function */
#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 3497ba0..27b5a58 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -109,6 +109,7 @@
#define CONFIG_DDR_ECC /* support DDR ECC function */
#define CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
/*
* DDRCDR - DDR Control Driver Register
diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h
index f584435..c2ff098 100644
--- a/include/configs/MPC8360ERDK.h
+++ b/include/configs/MPC8360ERDK.h
@@ -91,6 +91,7 @@
#define CONFIG_DDR_ECC /* support DDR ECC function */
#define CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
/*
* DDRCDR - DDR Control Driver Register
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 4befcab..aa17220 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -129,6 +129,7 @@
#undef CONFIG_DDR_ECC /* support DDR ECC function */
#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
+#undef CONFIG_MEM_INIT_VALUE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2b7d629..6a91395 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -156,6 +156,7 @@
#undef CONFIG_DDR_ECC /* support DDR ECC function */
#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
+#undef CONFIG_MEM_INIT_VALUE
#undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index efade69..fbb2e48 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -68,6 +68,7 @@
#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
#define DDR_CASLAT_25 /* CASLAT set to 2.5 */
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_MEM_INIT_VALUE
#undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 19da133..d9c88f2 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -84,6 +84,7 @@
#define CFG_83XX_DDR_USES_CS0
#undef CONFIG_DDR_ECC
+#undef CONFIG_MEM_INIT_VALUE
/*
* DDRCDR - DDR Control Driver Register
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 84a251a..5a62c69 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -74,6 +74,7 @@
*/
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#undef CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
+#undef CONFIG_MEM_INIT_VALUE
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
#define CONFIG_SYS_83XX_DDR_USES_CS0 /* WRS; Fsl board uses CS2/CS3 */
--
1.6.2.1
More information about the U-Boot
mailing list