[PATCH] mpc83xx: initialize ECC SDRAM with CPU

[Ira W. Snyder]

Signed-off-by: Ira W. Snyder <iws at ovro.caltech.edu>
---
 cpu/mpc83xx/spd_sdram.c |   58 +++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 58 insertions(+), 0 deletions(-)

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index ab6a2bb..7e093ae 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -1,3 +1,4 @@
+#define DEBUG 1
 /*
  * (C) Copyright 2006-2007 Freescale Semiconductor, Inc.
  *
@@ -825,18 +826,75 @@ long int spd_sdram()
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 /*
+ * Use timebase counter, get_timer() is not availabe
+ * at this point of initialization yet.
+ */
+static unsigned long get_tbms (void)
+{
+	unsigned long tbl;
+	unsigned long tbu1, tbu2;
+	unsigned long ms;
+	unsigned long long tmp;
+
+	ulong tbclk = get_tbclk();
+
+	/* get the timebase ticks */
+	do {
+		asm volatile ("mftbu %0":"=r" (tbu1):);
+		asm volatile ("mftb %0":"=r" (tbl):);
+		asm volatile ("mftbu %0":"=r" (tbu2):);
+	} while (tbu1 != tbu2);
+
+	/* convert ticks to ms */
+	tmp = (unsigned long long)(tbu1);
+	tmp = (tmp << 32);
+	tmp += (unsigned long long)(tbl);
+	ms = tmp/(tbclk/1000);
+
+	return ms;
+}
+
+void cpu_meminit(uint val, uint size)
+{
+	register u64 *p;
+	unsigned int pattern[2];
+
+	icache_enable();
+
+	pattern[0] = val;
+	pattern[1] = val;
+
+	for (p = 0; p < (u64*)(size); p++)
+		ppcDWstore((u32*)p, pattern);
+
+	asm volatile ("sync");
+
+	icache_disable();
+}
+
+/*
  * Initialize all of memory for ECC, then enable errors.
  */
 void ddr_enable_ecc(unsigned int dram_size)
 {
 	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile ddr83xx_t *ddr= &immap->ddr;
+	unsigned long s, e;
 
 	debug("\nInitializing ECC!\n");
 
+	s = get_tbms();
+#if 0
+	debug("\nInitializing ECC (using DMA)!\n");
 	dma_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
+#else
+	debug("\nInitializing ECC (using CPU)!\n");
+	cpu_meminit(CONFIG_MEM_INIT_VALUE, dram_size);
+#endif
+	e = get_tbms();
 
 	debug("\nREADY!\n");
+	debug("ddr init duration: %ld ms\n", e - s);
 
 	/* Clear All ECC Errors */
 	if ((ddr->err_detect & ECC_ERROR_DETECT_MME) == ECC_ERROR_DETECT_MME)
-- 
1.5.4.3