[U-Boot] [PATCH] Subject: [PATCH] ppc4xx: Add DL-Vision 405EP board support

[Wolfgang Denk]

Dear Dirk Eibach,

In message <1247230008-20141-1-git-send-email-eibach at gdsys.de> you wrote:
> Board support for the Guntermann & Drunck DL-Vision.
> 
> Signed-off-by: Dirk Eibach <eibach at gdsys.de>
...
> diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
> new file mode 100644
> index 0000000..232ebbd
> --- /dev/null
> +++ b/include/configs/dlvision.h
...
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +

One blank line only, please.

...
> +/*
> + * SDRAM configuration (please see cpu/ppc/sdram.[ch])
> + */
> +#define CONFIG_SDRAM_BANK0	1	/* init onboard SDRAM bank 0 */
> +
> +/* SDRAM timings used in datasheet */
> +#define CONFIG_SYS_SDRAM_CL             3	/* CAS latency */
> +#define CONFIG_SYS_SDRAM_tRP           20	/* PRECHARGE command period */
> +#define CONFIG_SYS_SDRAM_tRC           66	/* ACTIVE-to-ACTIVE command period */

Line too long.

> +#define CONFIG_SYS_SDRAM_tRCD          20	/* ACTIVE-to-READ delay */
> +#define CONFIG_SYS_SDRAM_tRFC          66	/* Auto refresh period */
> +
> +/*
> + * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
> + * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
> + * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.

Line too long (more too long lines elsewhere, please fix globally)


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
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