[U-Boot] [PATCH] Add support for the KwikByte KBOC OMAP35xx board
Jean-Christophe PLAGNIOL-VILLARD
plagnioj at jcrosoft.com
Sun Jul 12 15:13:57 CEST 2009
Could you regenerate it with the following option
git format-patch -M -B -C
> > + /* Configure GPIOs to output */
> > + writel(~(GPIO23 | GPIO17 | GPIO12 | GPIO11 | GPIO10 | GPIO8 | GPIO2),
> > + &gpio6_base->oe);
> > + writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
> > + GPIO13 | GPIO12), &gpio5_base->oe);
> > + writel(~(GPIO22 | GPIO13), &gpio1_base->oe);
> > +
> > + /* Set GPIOs */
> > + writel(GPIO23 | GPIO17 | GPIO10 | GPIO8 | GPIO2,
> > + &gpio6_base->setdataout);
> > + writel(GPIO31 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | GPIO13 | GPIO12,
> > + &gpio5_base->setdataout);
> > + writel(GPIO22 | GPIO13,
> > + &gpio1_base->setdataout);
> Aieeeee....... what are these gpios and why do they need to be set high?
>
> normally you might want to do setdataout followed by oe?
btw we have a gpio API now please use it
> > +
> > + dieid_num_r();
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * Routine: set_muxconf_regs
> > + * Description: Setting up the configuration Mux registers specific to the
> > + * hardware. Many pins need to be moved from protect to primary
> > + * mode.
> > + */
> > +void set_muxconf_regs(void)
> > +{
> > + MUX_KBOC();
> > +}
> > diff --git a/board/omap3/kboc/kboc.h b/board/omap3/kboc/kboc.h
please create you own vendor dirent
> > new file mode 100644
> > index 0000000..41c3b9e
> > --- /dev/null
> > +++ b/board/omap3/kboc/kboc.h
> > @@ -0,0 +1,382 @@
> > +/*
> > + * (C) Copyright 2009
> > + * KwikByte <www.kwikbyte.com>
> > + *
> > + * Author :
> > + * Christian Owens <christian at kwikbyte.com>
> > + *
> > + * Derived from the following:
> > + *
> > + * (C) Copyright 2008
> > + * Dirk Behme <dirk.behme at gmail.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +#ifndef _KBOC_H_
> > +#define _KBOC_H_
> > +
> > +const omap3_sysinfo sysinfo = {
> > + DDR_STACKED,
> > + "OMAP3 KBOC board",
> > +#if defined(CONFIG_ENV_IS_IN_ONENAND)
> > + "OneNAND",
> > +#else
> > + "NAND",
> > +#endif
>
> err... CONFIG_ENV_IS_IN_NAND is defined as 1 in config header.. means
> never support onenand?
> > +};
> > +
> > +/*
> > + * IEN - Input Enable
> > + * IDIS - Input Disable
> > + * PTD - Pull type Down
> > + * PTU - Pull type Up
> > + * DIS - Pull type selection is inactive
> > + * EN - Pull type selection is active
> > + * M0 - Mode 0
> > + * The commented string gives the final mux configuration for that pin
> > + */
> > +#define MUX_KBOC() \
> > + /*SDRC*/\
> > + MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /*SDRC_D0*/\
> > + MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /*SDRC_D1*/\
> > + MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /*SDRC_D2*/\
> > + MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /*SDRC_D3*/\
> > + MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /*SDRC_D4*/\
> > + MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /*SDRC_D5*/\
> > + MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /*SDRC_D6*/\
> > + MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /*SDRC_D7*/\
> > + MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /*SDRC_D8*/\
> > + MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /*SDRC_D9*/\
> > + MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /*SDRC_D10*/\
> > + MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /*SDRC_D11*/\
> > + MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /*SDRC_D12*/\
> > + MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /*SDRC_D13*/\
<snip>
> > + MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)) /*d2d_frint*/\
> > + MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)) /*d2d_dmareq0*/\
> > + MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)) /*d2d_dmareq1*/\
> > + MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)) /*d2d_dmareq2*/\
> > + MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)) /*d2d_dmareq3*/\
> > + MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)) /*d2d_n3gtrst*/\
> > + MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)) /*d2d_n3gtdi*/\
> > + MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)) /*d2d_n3gtdo*/\
> > + MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)) /*d2d_n3gtms*/\
> > + MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)) /*d2d_n3gtck*/\
> > + MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)) /*d2d_n3grtck*/\
> > + MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)) /*d2d_mstdby*/\
> > + MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)) /*d2d_swakeup*/\
> > + MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)) /*d2d_idlereq*/\
> > + MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)) /*d2d_idleack*/\
> > + MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)) /*d2d_mwrite*/\
> > + MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)) /*d2d_swrite*/\
> > + MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)) /*d2d_mread*/\
> > + MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/\
> > + MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\
> > + MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\
> > + MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
> > + MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
>
> one more reason why the mux needs a big change in mux handling :( I
> think we will end up with 1/2 a dozen crazy and code repetition for
> each board... Arrggghhh...
NM: yes, it's really not easy to follow here
do you plan to do it soon?
> > +
> > +#endif
> > diff --git a/include/configs/omap3_kboc.h b/include/configs/omap3_kboc.h
> > new file mode 100644
> > index 0000000..8a59612
> > --- /dev/null
> > +++ b/include/configs/omap3_kboc.h
> > @@ -0,0 +1,317 @@
> > +/*
> > + * (C) Copyright 2009
> > + * KwikByte <www.kwikbyte.com>
> > + *
> > + * Author :
> > + * Christian Owens <christian at kwikbyte.com>
> > + *
> > + * Configuration settings for the KwikByte OMAP3530 KBOC Module.
> > + *
> > + * Derived from the following:
> > + *
> > + * (C) Copyright 2006-2008
> > + * Texas Instruments.
> > + * Richard Woodruff <r-woodruff2 at ti.com>
> > + * Syed Mohammed Khasim <x0khasim at ti.com>
> > + *
> > + * Configuration settings for the TI OMAP3530 Beagle board.
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#ifndef __CONFIG_H
> > +#define __CONFIG_H
> > +#include <asm/sizes.h>
> > +
> > +/*
> > + * High Level Configuration Options
> > + */
> > +#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
> > +#define CONFIG_OMAP 1 /* in a TI OMAP core */
> > +#define CONFIG_OMAP34XX 1 /* which is a 34XX */
> > +#define CONFIG_OMAP3430 1 /* which is in a 3430 */
> > +#define CONFIG_OMAP3_KBOC 1 /* working with KBOC */
> > +
> > +#include <asm/arch/cpu.h> /* get chip and board defs */
> > +#include <asm/arch/omap3.h>
> > +
> > +/*
> > + * Display CPU and Board information
> > + */
> > +#define CONFIG_DISPLAY_CPUINFO 1
> > +#define CONFIG_DISPLAY_BOARDINFO 1
> > +
> > +/* Clock Defines */
> > +#define V_OSCK 26000000 /* Clock output from T2 */
> > +#define V_SCLK (V_OSCK >> 1)
> > +
> > +#undef CONFIG_USE_IRQ /* no support for IRQs */
> > +#define CONFIG_MISC_INIT_R
> > +
> > +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
> > +#define CONFIG_SETUP_MEMORY_TAGS 1
> > +#define CONFIG_INITRD_TAG 1
> > +#define CONFIG_REVISION_TAG 1
> > +
> > +/*
> > + * Size of malloc() pool
> > + */
> > +#define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */
> > + /* Sector */
> > +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
> > +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
> > + /* initial data */
> > +
> > +/*
> > + * Hardware drivers
> > + */
> > +
> > +/*
> > + * NS16550 Configuration
> > + */
> > +#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
> > +
> > +#define CONFIG_SYS_NS16550
> > +#define CONFIG_SYS_NS16550_SERIAL
> > +#define CONFIG_SYS_NS16550_REG_SIZE (-4)
> > +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
> > +
> > +/*
> > + * select serial console configuration
> > + */
> > +#define CONFIG_CONS_INDEX 3
> > +#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
> > +#define CONFIG_SERIAL3 3 /* UART3 on KBOC Rev 0.90 */
> > +
> > +/* allow to overwrite serial and ethaddr */
> > +#define CONFIG_ENV_OVERWRITE
> > +#define CONFIG_BAUDRATE 115200
> > +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
> > + 115200}
> > +#define CONFIG_MMC 1
> > +#define CONFIG_OMAP3_MMC 1
> > +#define CONFIG_DOS_PARTITION 1
> > +
> > +/* commands to include */
> > +#include <config_cmd_default.h>
> > +
> > +#define CONFIG_CMD_EXT2 /* EXT2 Support */
> > +#define CONFIG_CMD_FAT /* FAT support */
> > +#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
> > +#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
> > +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
> > +#define MTDIDS_DEFAULT "nand0=nand"
> > +#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
> > + "1920k(u-boot),128k(u-boot-env),"\
> > + "4m(kernel),-(fs)"
> > +
> > +#define CONFIG_CMD_I2C /* I2C serial bus support */
> > +#define CONFIG_CMD_MMC /* MMC support */
> > +#define CONFIG_CMD_NAND /* NAND support */
> > +
> > +#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
> > +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
> > +#undef CONFIG_CMD_IMI /* iminfo */
> > +#undef CONFIG_CMD_IMLS /* List all found images */
> > +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
> > +#undef CONFIG_CMD_NFS /* NFS support */
> > +
> > +#define CONFIG_SYS_NO_FLASH
> > +#define CONFIG_SYS_I2C_SPEED 100000
> > +#define CONFIG_SYS_I2C_SLAVE 1
> > +#define CONFIG_SYS_I2C_BUS 0
> > +#define CONFIG_SYS_I2C_BUS_SELECT 1
> > +#define CONFIG_DRIVER_OMAP34XX_I2C 1
> > +
> > +/*
> > + * Board NAND Info.
> > + */
> > +#define CONFIG_NAND_OMAP_GPMC
> > +#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
> > + /* to access nand */
> > +#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
> > + /* to access nand at */
> > + /* CS0 */
> > +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
> > +
> > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
> > + /* devices */
> > +
> > +#define CONFIG_JFFS2_NAND
> > +/* nand device jffs2 lives on */
> > +#define CONFIG_JFFS2_DEV "nand0"
> > +/* start of jffs2 partition */
> > +#define CONFIG_JFFS2_PART_OFFSET 0x680000
> > +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
> > + /* partition */
> > +
> > +/* Environment information */
> > +#define CONFIG_BOOTDELAY 3
> > +
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "loadaddr=0x82000000\0" \
> > + "console=ttyS2,115200n8\0" \
> > + "videomode=1024x768 at 60,vxres=1024,vyres=768\0" \
> > + "videospec=omapfb:vram:2M,vram:4M\0" \
> > + "mmcargs=setenv bootargs console=${console} " \
> > + "video=${videospec},mode:${videomode} " \
> > + "root=/dev/mmcblk0p2 rw " \
> > + "rootfstype=ext3 rootwait " \
> > + "${optargs}\0" \
> > + "nandargs=setenv bootargs console=${console} " \
> > + "video=${videospec},mode:${videomode} " \
> > + "root=/dev/mtdblock4 rw " \
> > + "rootfstype=jffs2 " \
> > + "${optargs}\0" \
> > + "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
> > + "bootscript=echo Running bootscript from mmc ...; " \
> > + "source ${loadaddr}\0" \
> > + "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
> > + "mmcboot=echo Booting from mmc ...; " \
> > + "run mmcargs; " \
> > + "bootm ${loadaddr}\0" \
> > + "nandboot=echo Booting from nand ...; " \
> > + "run nandargs; " \
> > + "nand read ${loadaddr} 280000 400000; " \
> > + "bootm ${loadaddr}\0" \
> > +
> > +#define CONFIG_BOOTCOMMAND \
> > + "if mmc init; then " \
> > + "if run loadbootscript; then " \
> > + "run bootscript; " \
> > + "else " \
> > + "if run loaduimage; then " \
> > + "run mmcboot; " \
> > + "else run nandboot; " \
> > + "fi; " \
> > + "fi; " \
> > + "else run nandboot; fi"
> > +
> > +#define CONFIG_AUTO_COMPLETE 1
> > +/*
> > + * Miscellaneous configurable options
> > + */
> > +#define V_PROMPT "OMAP3_KBOC # "
no need of add V_PROMPT define
please use CONFIG_SYS_PROMPT
> > +
> > +#define CONFIG_SYS_LONGHELP /* undef to save memory */
> > +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
> > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> > +#define CONFIG_SYS_PROMPT V_PROMPT
> > +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
> > +/* Print Buffer Size */
> > +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> > + sizeof(CONFIG_SYS_PROMPT) + 16)
Best Regards,
J.
More information about the U-Boot
mailing list