[U-Boot] Can I and/or D Cache work without MMU enabling in ARM11 or ARM cortex

[Drasko DRASKOVIC]

I yes, D no.

On Mon, Jul 13, 2009 at 9:04 AM, akshay ts <takshays at yahoo.co.in> wrote:

>
> Hi,
> I want to use i and/or D cache in ARM cortex on a OMAP3430 system without
> MMU. Is it possible?
>
> Warm Regards,
> Akshay
>
>
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