[U-Boot] [PATCH v3] Add "cpu_config" command for PPC4xx bootstrap configuration

Matthias Fuchs matthias.fuchs at esd.eu
Sun Jul 19 13:23:49 CEST 2009


Stefan,

On Sunday 19 July 2009 09:55:10 Wolfgang Denk wrote:
> Dear Matthias Fuchs,
>
> In message <4A619C0F.20103 at esd.eu> you wrote:
> > When writing more bytes to an eeprom than it's actual pagesize you have
> > to take special care. This is done in eeprom_write(). i2c_write() to
> > an eeprom only works with up to pagesize bytes!
> >
> > Either we use eeprom_write() or we use multiple call of i2c_write().
> > If we do not change this, Stefan's code does not work with 405EP cpus.
> > On these you have 0x20 strapping bytes and typicall EEPROMs with 8 or 16
> > bytes pagesize (24W01/02/04/08/16).
>
> I see. So we should probably enable and export eeprom_write() in this
> case, and then use it.
I see no other way.

Stefan, could you then please also a a further CONFIG option 
"CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET" to give a starting address of the
bootstrap data inside the EEPROM other than 0. On some 4xx CPUs you can select 
between different EEPROM offsets by external CPU pins. So bootstrap data could 
start at an address other than 0. It could also be helpful to pass this 
address somehow to the cpu_config during runtime. Let's say you have a 405EP 
based PCI adapter board that my use 33 or 66MHZ PCI clock dependant from the 
PCI M66EN signal. You could use that signal to make the bootstrap controller
select between two configurations. In this case to have to call cpu_config on
two EEPROM ranges with diffenrent arguments.

But to get cpu_config finally done, please add the _OFFSET option and I am 
happy. It could have a default of 0.

Matthias

>
> Best regards,
>
> Wolfgang Denk



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