[U-Boot] [PATCH v4] ppc4xx: Add GDsys CompactCenter board support.
Stefan Roese
sr at denx.de
Fri Jul 24 14:07:12 CEST 2009
Hi Dirk,
On Friday 24 July 2009 11:25:55 Dirk Eibach wrote:
> Changes since v3:
> - took nor fixup from canyonlands (This still depends on __ft_board_setup()
> working properly, which is not the case yet)
I just checked and noticed that this fixup I introduced a while ago for the
physical NOR address is not needed any more. Please give this version a
try, completely without additional fixup:
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index cfc1023..12385bf 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -579,23 +579,8 @@ extern void __ft_board_setup(void *blob, bd_t *bd);
void ft_board_setup(void *blob, bd_t *bd)
{
- u32 val[4];
- int rc;
-
__ft_board_setup(blob, bd);
- /* Fixup NOR mapping */
- val[0] = CONFIG_SYS_NOR_CS; /* chip select number */
- val[1] = 0; /* always 0 */
- val[2] = CONFIG_SYS_FLASH_BASE_PHYS_L; /* we fixed up this address */
- val[3] = gd->bd->bi_flashsize;
- rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
- val, sizeof(val), 1);
- if (rc) {
- printf("Unable to update property NOR mapping, err=%s\n",
- fdt_strerror(rc));
- }
-
if (gd->board_type == BOARD_CANYONLANDS_SATA) {
/*
* When SATA is selected we need to disable the first PCIe
And let me know if this works for you. Thanks.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================
More information about the U-Boot
mailing list