[U-Boot] MIPS: accessing flash > 8MB (Chetan Nanda)

Tim Braun tim.braun at librestream.com
Mon Jul 27 17:06:33 CEST 2009


Chetan Nanda wrote:
> We have a MIPS-4KEC based SoC and running an older version of U-Boot
> (1.1.3) on it. It is working perfectly fine.
> Board has 8MB AMD flash and starting address of that flash is 
> 0xBFC00000 (reset vector for MIPS).
> 
> Problem is that we are not able to access full 8MB of flash. Only 
> 0xBFC00000 - 0xBFFFFFFF (4MB) is accessible, as it lies in un-mapped, 
> un-cached region of MIPS.
>  From 0xC0000000 lies in mapped memory area of MIPS.
> 
> Now my questions are, creating entry in TLBs is sufficient to access 
> rest of 4MB of flash?

We are running U-Boot on an Raza Micro / AMD / Alchemy Au1200 and part
of our board initialization code says :

	/* PCMCIA is on a 36 bit physical address.
	   We need to map it into a 32 bit addresses */

	write_one_tlb(20,                 /* index */
		      0x01ffe000,         /* Pagemask, 16 MB pages */
		      CFG_PCMCIA_IO_BASE, /* Hi */
		      0x3C000017,         /* Lo0 */
		      0x3C200017);        /* Lo1 */

	write_one_tlb(21,                   /* index */
		      0x01ffe000,           /* Pagemask, 16 MB pages */
		      CFG_PCMCIA_ATTR_BASE, /* Hi */
		      0x3D000017,           /* Lo0 */
		      0x3D200017);          /* Lo1 */

In our case this maps the PCMCIA interface to usable 32 bit addresses
just fine, so I'm confident your board 
init code could map your flash to an aliased address that would allow
access to the whole 8 MB of flash.


Tim Braun
Sr. Des. Eng.
Librestream
O: +1.204.487.0612 ext 203
F: +1.204.487.0914
http://www.librestream.com

Now shipping... the Onsight 2000Ex mobile collaboration device, designed
for hazardous locations that require Class I, Div 2 approval -
http://www.librestream.com/news_release/2009-01-22.php


More information about the U-Boot mailing list