[U-Boot] [PATCH] ppc4xx: Support PPC460EX rev B on gdsys CompactCenter

[Dirk Eibach]

This patch is based on a patch for canyonlands by Stefan Roese.

Signed-off-by: Dirk Eibach <eibach at gdsys.de>
---
 board/gdsys/compactcenter/compactcenter.c |   16 ++++++++++++----
 1 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/compactcenter/compactcenter.c b/board/gdsys/compactcenter/compactcenter.c
index 477ef70..4861cc8 100644
--- a/board/gdsys/compactcenter/compactcenter.c
+++ b/board/gdsys/compactcenter/compactcenter.c
@@ -39,10 +39,19 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define CONFIG_SYS_BCSR3_PCIE		0x10
 
-int board_early_init_f(void)
+static int pvr_460ex(void)
 {
 	u32 pvr = get_pvr();
 
+	if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA) ||
+	    (pvr == PVR_460EX_RB))
+		return 1;
+
+	return 0;
+}
+
+int board_early_init_f(void)
+{
 	/*
 	 * Setup the interrupt controller polarities, triggers, etc.
 	 */
@@ -95,7 +104,7 @@ int board_early_init_f(void)
 	mtdcr(AHB_TOP, 0x8000004B);
 	mtdcr(AHB_BOT, 0x8000004B);
 
-	if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) {
+	if (pvr_460ex()) {
 		/*
 		 * Configure USB-STP pins as alternate and not GPIO
 		 * It seems to be neccessary to configure the STP pins as GPIO
@@ -250,7 +259,6 @@ int misc_init_r(void)
 {
 	u32 sdr0_srst1 = 0;
 	u32 eth_cfg;
-	u32 pvr = get_pvr();
 
 	/*
 	 * Set EMAC mode/configuration (GMII, SGMII, RGMII...).
@@ -264,7 +272,7 @@ int misc_init_r(void)
 	/* Set the for 2 RGMII mode */
 	/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
 	eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
-	if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA))
+	if (pvr_460ex())
 		eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
 	else
 		eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
-- 
1.5.6.5