[U-Boot] [PATCH 1/2]Refactored common cpu specific code for 85xx/86xx into one file.

Aggrwal Poonam-B10812 Poonam.Aggrwal at freescale.com
Thu Jul 30 15:02:51 CEST 2009


 Hello Kumar

If the patch is fine, could you please pick it up.

Many Thanks
Poonam

> -----Original Message-----
> From: Aggrwal Poonam-B10812 
> Sent: Wednesday, July 29, 2009 7:33 AM
> To: u-boot at lists.denx.de
> Cc: Aggrwal Poonam-B10812
> Subject: [PATCH 1/2]Refactored common cpu specific code for 
> 85xx/86xx into one file.
> 
> Removed same code pieces from cpu/mpc85xx/cpu.c and 
> cpu/mpc86xx/cpu.c  and moved to cpu/mpc8xxx/cpu.c(new file)
> 
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
> ---
> based on u-boot version 2009.06
>  Makefile             |    2 +
>  cpu/mpc85xx/cpu.c    |   70 +---------------------------------
>  cpu/mpc86xx/cpu.c    |   32 +---------------
>  cpu/mpc8xxx/Makefile |   25 ++++++++++++
>  cpu/mpc8xxx/cpu.c    |  105 
> ++++++++++++++++++++++++++++++++++++++++++++++++++
>  5 files changed, 134 insertions(+), 100 deletions(-)  create 
> mode 100644 cpu/mpc8xxx/Makefile  create mode 100644 cpu/mpc8xxx/cpu.c
> 
> diff --git a/Makefile b/Makefile
> index 2a06440..35dd6b2 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -262,10 +262,12 @@ endif
>  ifeq ($(CPU),mpc85xx)
>  LIBS += drivers/qe/qe.a
>  LIBS += cpu/mpc8xxx/ddr/libddr.a
> +LIBS += cpu/mpc8xxx/lib8xxx.a
>  TAG_SUBDIRS += cpu/mpc8xxx
>  endif
>  ifeq ($(CPU),mpc86xx)
>  LIBS += cpu/mpc8xxx/ddr/libddr.a
> +LIBS += cpu/mpc8xxx/lib8xxx.a
>  TAG_SUBDIRS += cpu/mpc8xxx
>  endif
>  LIBS += drivers/rtc/librtc.a
> diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 
> 28c6119..4724f27 100644
> --- a/cpu/mpc85xx/cpu.c
> +++ b/cpu/mpc85xx/cpu.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2004,2007,2008 Freescale Semiconductor, Inc.
> + * Copyright 2004,2007-2009 Freescale Semiconductor, Inc.
>   * (C) Copyright 2002, 2003 Motorola Inc.
>   * Xianghua Xiao (X.Xiao at motorola.com)
>   *
> @@ -29,58 +29,12 @@
>  #include <common.h>
>  #include <watchdog.h>
>  #include <command.h>
> -#include <tsec.h>
> -#include <netdev.h>
>  #include <fsl_esdhc.h>
>  #include <asm/cache.h>
>  #include <asm/io.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> -struct cpu_type cpu_type_list [] = {
> -	CPU_TYPE_ENTRY(8533, 8533),
> -	CPU_TYPE_ENTRY(8533, 8533_E),
> -	CPU_TYPE_ENTRY(8535, 8535),
> -	CPU_TYPE_ENTRY(8535, 8535_E),
> -	CPU_TYPE_ENTRY(8536, 8536),
> -	CPU_TYPE_ENTRY(8536, 8536_E),
> -	CPU_TYPE_ENTRY(8540, 8540),
> -	CPU_TYPE_ENTRY(8541, 8541),
> -	CPU_TYPE_ENTRY(8541, 8541_E),
> -	CPU_TYPE_ENTRY(8543, 8543),
> -	CPU_TYPE_ENTRY(8543, 8543_E),
> -	CPU_TYPE_ENTRY(8544, 8544),
> -	CPU_TYPE_ENTRY(8544, 8544_E),
> -	CPU_TYPE_ENTRY(8545, 8545),
> -	CPU_TYPE_ENTRY(8545, 8545_E),
> -	CPU_TYPE_ENTRY(8547, 8547_E),
> -	CPU_TYPE_ENTRY(8548, 8548),
> -	CPU_TYPE_ENTRY(8548, 8548_E),
> -	CPU_TYPE_ENTRY(8555, 8555),
> -	CPU_TYPE_ENTRY(8555, 8555_E),
> -	CPU_TYPE_ENTRY(8560, 8560),
> -	CPU_TYPE_ENTRY(8567, 8567),
> -	CPU_TYPE_ENTRY(8567, 8567_E),
> -	CPU_TYPE_ENTRY(8568, 8568),
> -	CPU_TYPE_ENTRY(8568, 8568_E),
> -	CPU_TYPE_ENTRY(8569, 8569),
> -	CPU_TYPE_ENTRY(8569, 8569_E),
> -	CPU_TYPE_ENTRY(8572, 8572),
> -	CPU_TYPE_ENTRY(8572, 8572_E),
> -	CPU_TYPE_ENTRY(P2020, P2020),
> -	CPU_TYPE_ENTRY(P2020, P2020_E),
> -};
> -
> -struct cpu_type *identify_cpu(u32 ver)
> -{
> -	int i;
> -	for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
> -		if (cpu_type_list[i].soc_ver == ver)
> -			return &cpu_type_list[i];
> -
> -	return NULL;
> -}
> -
>  int checkcpu (void)
>  {
>  	sys_info_t sysinfo;
> @@ -329,28 +283,6 @@ void upmconfig (uint upm, uint * table, 
> uint size)
>  	out_be32(mxmr, (in_be32(mxmr) & 0x4fffffc0) | MxMR_OP_NORM);  }
>  
> -
> -/*
> - * Initializes on-chip ethernet controllers.
> - * to override, implement board_eth_init()
> - */
> -int cpu_eth_init(bd_t *bis)
> -{
> -#if defined(CONFIG_ETHER_ON_FCC)
> -	fec_initialize(bis);
> -#endif
> -
> -#if defined(CONFIG_UEC_ETH)
> -	uec_standard_init(bis);
> -#endif
> -
> -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
> -	tsec_standard_init(bis);
> -#endif
> -
> -	return 0;
> -}
> -
>  /*
>   * Initializes on-chip MMC controllers.
>   * to override, implement board_mmc_init() diff --git 
> a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index bc64286..32d06d2 100644
> --- a/cpu/mpc86xx/cpu.c
> +++ b/cpu/mpc86xx/cpu.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2006 Freescale Semiconductor
> + * Copyright 2006,2009 Freescale Semiconductor, Inc.
>   * Jeff Brown
>   * Srikanth Srinivasan (srikanth.srinivasan at freescale.com)
>   *
> @@ -28,25 +28,8 @@
>  #include <asm/cache.h>
>  #include <asm/mmu.h>
>  #include <mpc86xx.h>
> -#include <tsec.h>
>  #include <asm/fsl_law.h>
>  
> -struct cpu_type cpu_type_list [] = {
> -	CPU_TYPE_ENTRY(8610, 8610),
> -	CPU_TYPE_ENTRY(8641, 8641),
> -	CPU_TYPE_ENTRY(8641D, 8641D),
> -};
> -
> -struct cpu_type *identify_cpu(u32 ver)
> -{
> -	int i;
> -	for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
> -		if (cpu_type_list[i].soc_ver == ver)
> -			return &cpu_type_list[i];
> -
> -	return NULL;
> -}
> -
>  /*
>   * Default board reset function
>   */
> @@ -209,16 +192,3 @@ void mpc86xx_reginfo(void)
>  	printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", 
> in_be32(&lbc->br7), in_be32(&lbc->or7));
>  
>  }
> -
> -/*
> - * Initializes on-chip ethernet controllers.
> - * to override, implement board_eth_init()
> - */
> -int cpu_eth_init(bd_t *bis)
> -{
> -#if defined(CONFIG_TSEC_ENET)
> -	tsec_standard_init(bis);
> -#endif
> -
> -	return 0;
> -}
> diff --git a/cpu/mpc8xxx/Makefile b/cpu/mpc8xxx/Makefile new 
> file mode 100644 index 0000000..430a75f
> --- /dev/null
> +++ b/cpu/mpc8xxx/Makefile
> @@ -0,0 +1,25 @@
> +#
> +# Copyright 2009 Freescale Semiconductor, Inc.
> +#
> +# This program is free software; you can redistribute it and/or # 
> +modify it under the terms of the GNU General Public License 
> # Version 2 
> +as published by the Free Software Foundation.
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib8xxx.a
> +
> +COBJS-y	+= cpu.o
> +
> +SRCS	:= $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
> +
> +all:	$(obj).depend $(LIB)
> +
> +$(LIB):	$(OBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c new file 
> mode 100644 index 0000000..3de3bda
> --- /dev/null
> +++ b/cpu/mpc8xxx/cpu.c
> @@ -0,0 +1,105 @@
> +/*
> + * Copyright 2009 Freescale Semiconductor, Inc.
> + *
> + * This file is derived from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c.
> + * Basically this file contains cpu specific common code for 
> 85xx/86xx
> + * processors.
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <common.h>
> +#include <command.h>
> +#include <tsec.h>
> +#include <netdev.h>
> +#include <asm/cache.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct cpu_type cpu_type_list [] = {
> +#if defined(CONFIG_MPC85xx)
> +	CPU_TYPE_ENTRY(8533, 8533),
> +	CPU_TYPE_ENTRY(8533, 8533_E),
> +	CPU_TYPE_ENTRY(8535, 8535),
> +	CPU_TYPE_ENTRY(8535, 8535_E),
> +	CPU_TYPE_ENTRY(8536, 8536),
> +	CPU_TYPE_ENTRY(8536, 8536_E),
> +	CPU_TYPE_ENTRY(8540, 8540),
> +	CPU_TYPE_ENTRY(8541, 8541),
> +	CPU_TYPE_ENTRY(8541, 8541_E),
> +	CPU_TYPE_ENTRY(8543, 8543),
> +	CPU_TYPE_ENTRY(8543, 8543_E),
> +	CPU_TYPE_ENTRY(8544, 8544),
> +	CPU_TYPE_ENTRY(8544, 8544_E),
> +	CPU_TYPE_ENTRY(8545, 8545),
> +	CPU_TYPE_ENTRY(8545, 8545_E),
> +	CPU_TYPE_ENTRY(8547, 8547_E),
> +	CPU_TYPE_ENTRY(8548, 8548),
> +	CPU_TYPE_ENTRY(8548, 8548_E),
> +	CPU_TYPE_ENTRY(8555, 8555),
> +	CPU_TYPE_ENTRY(8555, 8555_E),
> +	CPU_TYPE_ENTRY(8560, 8560),
> +	CPU_TYPE_ENTRY(8567, 8567),
> +	CPU_TYPE_ENTRY(8567, 8567_E),
> +	CPU_TYPE_ENTRY(8568, 8568),
> +	CPU_TYPE_ENTRY(8568, 8568_E),
> +	CPU_TYPE_ENTRY(8569, 8569),
> +	CPU_TYPE_ENTRY(8569, 8569_E),
> +	CPU_TYPE_ENTRY(8572, 8572),
> +	CPU_TYPE_ENTRY(8572, 8572_E),
> +	CPU_TYPE_ENTRY(P2020, P2020),
> +	CPU_TYPE_ENTRY(P2020, P2020_E),
> +#elif defined(CONFIG_MPC86xx)
> +	CPU_TYPE_ENTRY(8610, 8610),
> +	CPU_TYPE_ENTRY(8641, 8641),
> +	CPU_TYPE_ENTRY(8641D, 8641D),
> +#endif
> +};
> +
> +struct cpu_type *identify_cpu(u32 ver)
> +{
> +	int i;
> +	for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++)
> +		if (cpu_type_list[i].soc_ver == ver)
> +			return &cpu_type_list[i];
> +
> +	return NULL;
> +}
> +
> +/*
> + * Initializes on-chip ethernet controllers.
> + * to override, implement board_eth_init()  */ int cpu_eth_init(bd_t 
> +*bis) { #if defined(CONFIG_ETHER_ON_FCC)
> +	fec_initialize(bis);
> +#endif
> +
> +#if defined(CONFIG_UEC_ETH)
> +	uec_standard_init(bis);
> +#endif
> +
> +#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
> +	tsec_standard_init(bis);
> +#endif
> +
> +	return 0;
> +}
> --
> 1.5.6.5
> 
> 


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