[U-Boot] [PATCH v2 3/3] ppc/p1_p1_RDB: DDR Relocation support for NAND/SD/eSPI Boot

[Kumar Gala]

On Oct 9, 2009, at 2:01 AM, Dudhat Dipen-B09055 wrote:

>> +
>> +void initsdram(void)
>> +{
>> +
>> +	volatile ccsr_ddr_t *ddr= (ccsr_ddr_t
> *)CONFIG_SYS_MPC85xx_DDR_ADDR;
>> +	int d_init, dbw;
>> +	volatile ccsr_gpio_t *pgpio = (void *)
>> (CONFIG_SYS_MPC85xx_GPIO_ADDR);
>> +	unsigned int ddr_size;
>> +	sys_info_t sysinfo;
>> +	phys_size_t dram_size = 0;
>> +
>> +	set_next_law(0,LAW_SIZE_1G , LAW_TRGT_IF_DDR_1);
>
> Can we not use fsl_ddr_set_memctl_regs()?  If not these should be
> using out_be32()
>
> Why can't we use set_next_law / set_law function here???
> I mean at the end they are using out_be32() for setting up LAW
> registers..
>
> - Dipen

I'm confused about what you are saying here.

- k