[U-Boot] [PATCH v1 1/2] NET: Move MDIO regs out of TSEC Space

Kumar Gopalpet-B05799 Sandeep.Kumar at freescale.com
Mon Oct 19 05:37:07 CEST 2009


 

>-----Original Message-----
>From: Kumar Gala [mailto:galak at kernel.crashing.org] 
>Sent: Monday, October 19, 2009 12:08 AM
>To: Kumar Gopalpet-B05799
>Cc: u-boot at lists.denx.de
>Subject: Re: [U-Boot] [PATCH v1 1/2] NET: Move MDIO regs out 
>of TSEC Space
>
>
>On Oct 18, 2009, at 3:43 AM, Sandeep Gopalpet wrote:
>
>> Moved the mdio regs out of the tsec structure,and provided different 
>> offsets for tsec base and mdio base so that provision for 
>etsec2.0 can 
>> be provided.
>>
>> This patch helps in providing the support for etsec2.0 In etsec2.0, 
>> the MDIO register space and the etsec reg space are different.
>>
>> Signed-off-by: Sandeep Gopalpet <sandeep.kumar at freescale.com>
>> ---
>> drivers/net/tsec.c           |   20 ++++++++--------
>> include/asm-ppc/immap_85xx.h |   10 ++++++++
>> include/tsec.h               |   48 ++++++++++++++++++++++++++++++ 
>> +----------
>> 3 files changed, 56 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 
>> 5c3d261..2ad033e 100644
>> --- a/drivers/net/tsec.c
>> +++ b/drivers/net/tsec.c
>> @@ -83,7 +83,7 @@ static struct tsec_info_struct tsec_info[] = { 
>> #ifdef CONFIG_MPC85XX_FEC
>> 	{
>> 		.regs = (tsec_t *)(TSEC_BASE_ADDR + 0x2000),
>> -		.miiregs = (tsec_t *)(TSEC_BASE_ADDR),
>> +		.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR),
>> 		.devname = CONFIG_MPC85XX_FEC_NAME,
>> 		.phyaddr = FEC_PHY_ADDR,
>> 		.flags = FEC_FLAGS
>> @@ -136,6 +136,7 @@ int tsec_initialize(bd_t * bis, struct 
>> tsec_info_struct *tsec_info)
>> 	privlist[num_tsecs++] = priv;
>> 	priv->regs = tsec_info->regs;
>> 	priv->phyregs = tsec_info->miiregs;
>> +	priv->phyregs_sgmii = tsec_info->miiregs_sgmii;
>>
>> 	priv->phyaddr = tsec_info->phyaddr;
>> 	priv->flags = tsec_info->flags;
>> @@ -222,7 +223,7 @@ int tsec_init(struct eth_device *dev, 
>bd_t * bd) }
>>
>> /* Writes the given phy's reg with value, using the specified MDIO 
>> regs */ -static void tsec_local_mdio_write(volatile tsec_t *phyregs, 
>> uint addr,
>> +static void tsec_local_mdio_write(volatile tsec_mdio_t *phyregs,
>> uint addr,
>> 		uint reg, uint value)
>> {
>> 	int timeout = 1000000;
>> @@ -245,7 +246,7 @@ static void 
>tsec_local_mdio_write(volatile tsec_t 
>> *phyregs, uint addr,
>>  * notvalid bit cleared), and the bus to cease activity (miimind
>>  * busy bit cleared), and then returns the value  */ -uint 
>> tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint 
>> regnum)
>> +uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs, uint
>> phyid, uint regnum)
>> {
>> 	uint value;
>>
>> @@ -290,11 +291,11 @@ static void tsec_configure_serdes(struct 
>> tsec_private *priv) {
>> 	/* Access TBI PHY registers at given TSEC register 
>offset as opposed 
>> to the
>> 	 * register offset used for external PHY accesses */
>> -	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
>> +	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa,
>> TBI_ANA,
>> 			TBIANA_SETTINGS);
>> -	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
>> +	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa,
>> TBI_TBICON,
>> 			TBICON_CLK_SELECT);
>> -	tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
>> +	tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa,
>> TBI_CR,
>> 			TBICR_SETTINGS);
>> }
>>
>> @@ -306,12 +307,11 @@ static int init_phy(struct eth_device *dev) {
>> 	struct tsec_private *priv = (struct tsec_private *)dev->priv;
>> 	struct phy_info *curphy;
>> -	volatile tsec_t *phyregs = priv->phyregs;
>> +	volatile tsec_mdio_t *phyregs = priv->phyregs;
>> 	volatile tsec_t *regs = priv->regs;
>>
>> 	/* Assign a Physical address to the TBI */
>> 	regs->tbipa = CONFIG_SYS_TBIPA_VALUE;
>> -	phyregs->tbipa = CONFIG_SYS_TBIPA_VALUE;
>> 	asm("sync");
>>
>> 	/* Reset MII (due to new addresses) */ @@ -739,7 +739,7 @@ uint 
>> mii_parse_dm9161_scsr(uint mii_reg, struct tsec_private * priv) uint 
>> mii_cis8204_fixled(uint mii_reg, struct tsec_private * priv) {
>> 	uint phyid;
>> -	volatile tsec_t *regbase = priv->phyregs;
>> +	volatile tsec_mdio_t *regbase = priv->phyregs;
>> 	int timeout = 1000000;
>>
>> 	for (phyid = 0; phyid < 4; phyid++) { @@ -1772,7 
>+1772,7 @@ void 
>> phy_run_commands(struct tsec_private *priv, struct phy_cmd *cmd) {
>> 	int i;
>> 	uint result;
>> -	volatile tsec_t *phyregs = priv->phyregs;
>> +	volatile tsec_mdio_t *phyregs = priv->phyregs;
>>
>> 	phyregs->miimcfg = MIIMCFG_RESET;
>>
>> diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/ 
>> immap_85xx.h index 4194295..6c9baac 100644
>> --- a/include/asm-ppc/immap_85xx.h
>> +++ b/include/asm-ppc/immap_85xx.h
>> @@ -1932,4 +1932,14 @@ typedef struct ccsr_gur { #define 
>> CONFIG_SYS_MPC85xx_USB_ADDR \
>> 	(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
>>
>> +/* TSEC and MDIO OFFSETS */
>> +#define CONFIG_SYS_TSEC1_OFFSET		(0x24000)
>> +#define TSEC_SIZE			(0x01000)
>> +
>> +#define CONFIG_SYS_MDIO1_OFFSET		(0x24520)
>> +#define MDIO_OFFSET     		(0x01000)
>> +
>> +#define TSEC_BASE_ADDR		(CONFIG_SYS_IMMR + 
>CONFIG_SYS_TSEC1_OFFSET)
>> +#define MDIO_BASE_ADDR		(CONFIG_SYS_IMMR + 
>CONFIG_SYS_MDIO1_OFFSET)
>> +
>
>Do we even need these here?  We haven't historically.
>
Since these are platform dependent, we want the above to be defined
here.

>> #endif /*__IMMAP_85xx__*/
>> diff --git a/include/tsec.h b/include/tsec.h index 0ac3034..342c07e 
>> 100644
>> --- a/include/tsec.h
>> +++ b/include/tsec.h
>> @@ -7,7 +7,7 @@
>>  *  terms of the GNU Public License, Version 2, incorporated
>>  *  herein by reference.
>>  *
>> - * Copyright 2004, 2007 Freescale Semiconductor, Inc.
>> + * Copyright 2004, 2007, 2009  Freescale Semiconductor, Inc.
>>  * (C) Copyright 2003, Motorola, Inc.
>>  * maintained by Xianghua Xiao (x.xiao at motorola.com)
>>  * author Andy Fleming
>> @@ -24,18 +24,34 @@
>>     #define CONFIG_SYS_TSEC1_OFFSET	(0x24000)
>> #endif
>>
>> -#define TSEC_SIZE	0x01000
>> +#ifndef TSEC_SIZE
>> +	#define TSEC_SIZE	0x01000
>> +#endif
>
>Do we really need a #ifndef here?
>
Yes. In case it is not defined in immap_85xx, wefall back to the older
options.

>> +
>> +#ifndef CONFIG_SYS_MDIO1_OFFSET
>> +    #define CONFIG_SYS_MDIO1_OFFSET	(0x24520)
>> +#endif
>
>the parens aren't needed.
>
OK.

>> +
>> +#ifndef MDIO_OFFSET
>> +	#define MDIO_OFFSET	0x01000
>> +#endif
>
>How about calling this TSEC_MDIO_OFFSET
>
OK, I will change it (I just carried forward the existing #define
variable ) 
>>
>> /* FIXME:  Should these be pushed back to 83xx and 85xx 
>config files? 
>> */ #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
>> 	|| defined(CONFIG_MPC83xx)
>> +#ifndef TSEC_BASE_ADDR
>>     #define TSEC_BASE_ADDR	(CONFIG_SYS_IMMR + 
>CONFIG_SYS_TSEC1_OFFSET)
>> #endif
>> +#ifndef MDIO_BASE_ADDR
>> +    #define MDIO_BASE_ADDR	(CONFIG_SYS_IMMR +  
>> CONFIG_SYS_MDIO1_OFFSET)
>> +#endif
>> +#endif
>
>Do we really need the #ifndef's here?
>
The correct place for defining the MDIO and TSEC base addr is the
platformm file as they are 
dependent on the platform not on the IP itself ( although in most cases
for a particular version of IP,
this may not change) and since these were earlier defined here, I have
defined these as a part of immap_85xx.h
But for all other platforms they are not defined yet, hence #ifndefs are
required.
Once these base addrs are moved to platform specific files,they can be
removed complatelly form here. 
>>
>> #define STD_TSEC_INFO(num) \
>> {			\
>> 	.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)), \
>> -	.miiregs = (tsec_t *)TSEC_BASE_ADDR, \
>> +	.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR), \
>> +	.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num -1)
>> *MDIO_OFFSET ), \
>> 	.devname = CONFIG_TSEC##num##_NAME, \
>> 	.phyaddr = TSEC##num##_PHY_ADDR, \
>> 	.flags = TSEC##num##_FLAGS \
>> @@ -44,7 +60,8 @@
>> #define SET_STD_TSEC_INFO(x, num) \
>> {			\
>> 	x.regs = (tsec_t *)(TSEC_BASE_ADDR + ((num - 1) * TSEC_SIZE)); \
>> -	x.miiregs = (tsec_t *)TSEC_BASE_ADDR; \
>> +	x.miiregs = (tsec_mdio_t *)(MDIO_BASE_ADDR); \
>> +	x.miiregs_sgmii = (tsec_mdio_t *)(MDIO_BASE_ADDR + (num -1)
>> *MDIO_OFFSET); \
>> 	x.devname = CONFIG_TSEC##num##_NAME; \
>> 	x.phyaddr = TSEC##num##_PHY_ADDR; \
>> 	x.flags = TSEC##num##_FLAGS;\
>> @@ -461,6 +478,16 @@ typedef struct tsec_hash_regs
>> 	uint	res2[24];
>> } tsec_hash_t;
>>
>> +typedef struct tsec_mdio
>> +{
>> +	uint	miimcfg;	/* MII Management: Configuration */
>> +	uint	miimcom;	/* MII Management: Command */
>> +	uint	miimadd;	/* MII Management: Address */
>> +	uint	miimcon;	/* MII Management: Control */
>> +	uint	miimstat;	/* MII Management: Status */
>> +	uint	miimind;	/* MII Management: Indicators */
>> +} tsec_mdio_t;
>> +
>> typedef struct tsec
>> {
>> 	/* General Control and Status Registers (0x2_n000) */ 
>@@ -526,12 
>> +553,7 @@ typedef struct tsec
>>
>> 	uint	res51c;
>>
>> -	uint	miimcfg;	/* MII Management: Configuration */
>> -	uint	miimcom;	/* MII Management: Command */
>> -	uint	miimadd;	/* MII Management: Address */
>> -	uint	miimcon;	/* MII Management: Control */
>> -	uint	miimstat;	/* MII Management: Status */
>> -	uint	miimind;	/* MII Management: Indicators */
>> +	uint	resmdio[6];
>>
>> 	uint	res538;
>>
>> @@ -571,7 +593,8 @@ typedef struct tsec
>>
>> struct tsec_private {
>> 	volatile tsec_t *regs;
>> -	volatile tsec_t *phyregs;
>> +	volatile tsec_mdio_t *phyregs;
>> +	volatile tsec_mdio_t *phyregs_sgmii;
>> 	struct phy_info *phyinfo;
>> 	uint phyaddr;
>> 	u32 flags;
>> @@ -630,7 +653,8 @@ struct phy_info {
>>
>> struct tsec_info_struct {
>> 	tsec_t *regs;
>> -	tsec_t *miiregs;
>> +	tsec_mdio_t *miiregs;
>> +	tsec_mdio_t *miiregs_sgmii;
>> 	char *devname;
>> 	unsigned int phyaddr;
>> 	u32 flags;
>> --
>> 1.5.2.2
>>
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>
>
>


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