[U-Boot] imx27lite stability problems.

[javier Martin]

2009/10/16 Wolfgang Denk <wd at denx.de>:
> Dear Javier Martin,
>
> In message <eedb5540910160633o81b1ae3sf37b2a00a5474584 at mail.gmail.com> you wrote:
>>
>> I could finally test this in an original LogicPD i.mx27 litekit board
>> and found the same problems.
>> System gets stuck when issuing a ping command.
>>
>> - I am using u-boot-arm repository "commit
>> 617da90c1dcf65428ddfb63fef897439950bc915" without any modifications.
>
> Can you please use mainline, i. e. the master branch at
> git://git.denx.de/u-boot.git instead?
>
>> Please, do you have an idea of what could I be missing?
>
> Well, there is a "Possible iMX27 intermittent Ethernet connection
> issue rework" issued by LPD on 7/8/2008; in essence the PHY's
> internal 1.8V core regulator may shut off at power up.
>
> To work around this, try and implement the following two hardware
> modifications:
>
> 1) Populate R841 with a 4.7K resistor. (This forces the internal core
>   regulator off for the LAN8700. R841 is located on top of the PCB
>   just "above" the LAN8700 IC.
>
> 2) Add a jumper wire from U125.5 to C561.1. This connects the on
>   board 1.8V rail to the core ensuring that it is always powered.


Before trying hardware fixes you suggested I tried using another
toolchain which comes with LTIB for i.mx27ads:

* I used arm-linux-gnueabi- toolchain from LTIB with the command:

USE_PRIVATE_LIBGCC=yes make  CROSS_COMPILE=arm-none-linux-gnueabi-

And found some improvements, ping doesn't hang the system, although it
fails, but the second time it is executed I get an error:

=> ping 192.168.0.40
FEC_MXC: Autonegotiation timeout
Using FEC_MXC device
ping failed; host 192.168.0.40 is not alive

=> ping 192.168.0.40

Unhandled Exception:
exception mode: abort
fsr: 0x00000008 far: 0x0000000c

**UNRECOVERABLE ERROR**
There was a memory access exception at 0x0000000c of type 'extern fetch1'
this may be due to an access to an invalid memory region,
unaligned access, or a problem with the current memory map.
Please check the memory layout section of your processor manual.
For information about the active memory map type 'info cpu'.

r00: a7e9c000 r01: 00000000 r02: 00000000 r03: 00000000
r04: a7e816f8 r05: a7e81700 r06: 00000000 r07: a7f31600
r08: a7e6ffe0 r09: 00000000 r10: 00000000 r11: 00000000
r12: a7f326f0 sp:  a7e6f270 lr:  0001a908  pc: a7f1774c
spsr:000000d3 cpsr:000000d7
bt: sp: a7e6f1a8 (stack: a00667e4 - a00697e4)
(fp:00000000->a7e6f1d0, sp:a7e6f1a8)

What toolchain are you using for compiling this? It seems I got a
different behavior changing it.

-- 
Javier Martin
Vista Silicon S.L.
CDTUC - FASE C - Oficina S-345
Avda de los Castros s/n
39005- Santander. Cantabria. Spain
+34 942 25 32 60
www.vista-silicon.com