[U-Boot] [PING][PATCH] Enable port-mapped access to 16550 UART

[Graeme Russ]

Has anyone had a chance to look at this?

This patch is a pre-requisite for converting my x86 board to use this
driver (and
CONFIG_SERIAL_MULTI) and droping one more redundant source file from the u-boot
tree (cpu/i386/serial.c)

Regards,

Graeme

On Sat, Oct 24, 2009 at 12:27 PM, Graeme Russ <graeme.russ at gmail.com> wrote:
> This patch does two things:
>  - Changes default behaviour to use proper memory accessors
>  - Allows port-mapped access (using inb/outb) for the x86 architecture
>
> Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
> ---
>  drivers/serial/ns16550.c |   69 ++++++++++++++++++++++++++--------------------
>  1 files changed, 39 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index 2fcc8c3..c41ca0d 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -6,6 +6,8 @@
>
>  #include <config.h>
>  #include <ns16550.h>
> +#include <linux/types.h>
> +#include <asm/io.h>
>
>  #define UART_LCRVAL UART_LCR_8N1               /* 8 data, 1 stop, no parity */
>  #define UART_MCRVAL (UART_MCR_DTR | \
> @@ -13,28 +15,35 @@
>  #define UART_FCRVAL (UART_FCR_FIFO_EN |        \
>                     UART_FCR_RXSR |    \
>                     UART_FCR_TXSR)             /* Clear & enable FIFOs */
> +#ifdef CONFIG_X86
> +#define uart_writeb(x,y)       outb(x,(ulong)y)
> +#define uart_readb(y)          inb((ulong)y)
> +#else
> +#define uart_writeb(x,y) writeb(x,y)
> +#define uart_readb(y) readb(y)
> +#endif
>
>  void NS16550_init (NS16550_t com_port, int baud_divisor)
>  {
> -       com_port->ier = 0x00;
> +       uart_writeb(0x00, &com_port->ier);
>  #if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
> -       com_port->mdr1 = 0x7;   /* mode select reset TL16C750*/
> +       uart_writeb(0x7, &com_port->mdr1);      /* mode select reset TL16C750*/
>  #endif
> -       com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
> -       com_port->dll = 0;
> -       com_port->dlm = 0;
> -       com_port->lcr = UART_LCRVAL;
> -       com_port->mcr = UART_MCRVAL;
> -       com_port->fcr = UART_FCRVAL;
> -       com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
> -       com_port->dll = baud_divisor & 0xff;
> -       com_port->dlm = (baud_divisor >> 8) & 0xff;
> -       com_port->lcr = UART_LCRVAL;
> +       uart_writeb(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr);
> +       uart_writeb(0, &com_port->dll);
> +       uart_writeb(0, &com_port->dlm);
> +       uart_writeb(UART_LCRVAL, &com_port->lcr);
> +       uart_writeb(UART_MCRVAL, &com_port->mcr);
> +       uart_writeb(UART_FCRVAL, &com_port->fcr);
> +       uart_writeb(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
> +       uart_writeb(baud_divisor & 0xff, &com_port->dll);
> +       uart_writeb((baud_divisor >> 8) & 0xff, &com_port->dlm);
> +       uart_writeb(UART_LCRVAL, &com_port->lcr);
>  #if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)
>  #if defined(CONFIG_APTIX)
> -       com_port->mdr1 = 3;     /* /13 mode so Aptix 6MHz can hit 115200 */
> +       uart_writeb(3, &com_port->mdr1);        /* /13 mode so Aptix 6MHz can hit 115200 */
>  #else
> -       com_port->mdr1 = 0;     /* /16 is proper to hit 115200 with 48MHz */
> +       uart_writeb(0, &com_port->mdr1);        /* /16 is proper to hit 115200 with 48MHz */
>  #endif
>  #endif /* CONFIG_OMAP */
>  }
> @@ -42,41 +51,41 @@ void NS16550_init (NS16550_t com_port, int baud_divisor)
>  #ifndef CONFIG_NS16550_MIN_FUNCTIONS
>  void NS16550_reinit (NS16550_t com_port, int baud_divisor)
>  {
> -       com_port->ier = 0x00;
> -       com_port->lcr = UART_LCR_BKSE | UART_LCRVAL;
> -       com_port->dll = 0;
> -       com_port->dlm = 0;
> -       com_port->lcr = UART_LCRVAL;
> -       com_port->mcr = UART_MCRVAL;
> -       com_port->fcr = UART_FCRVAL;
> -       com_port->lcr = UART_LCR_BKSE;
> -       com_port->dll = baud_divisor & 0xff;
> -       com_port->dlm = (baud_divisor >> 8) & 0xff;
> -       com_port->lcr = UART_LCRVAL;
> +       uart_writeb(0x00, &com_port->ier);
> +       uart_writeb(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
> +       uart_writeb(0, &com_port->dll);
> +       uart_writeb(0, &com_port->dlm);
> +       uart_writeb(UART_LCRVAL, &com_port->lcr);
> +       uart_writeb(UART_MCRVAL, &com_port->mcr);
> +       uart_writeb(UART_FCRVAL, &com_port->fcr);
> +       uart_writeb(UART_LCR_BKSE, &com_port->lcr);
> +       uart_writeb(baud_divisor & 0xff, &com_port->dll);
> +       uart_writeb((baud_divisor >> 8) & 0xff, &com_port->dlm);
> +       uart_writeb(UART_LCRVAL, &com_port->lcr);
>  }
>  #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
>
>  void NS16550_putc (NS16550_t com_port, char c)
>  {
> -       while ((com_port->lsr & UART_LSR_THRE) == 0);
> -       com_port->thr = c;
> +       while ((uart_readb(&com_port->lsr) & UART_LSR_THRE) == 0);
> +       uart_writeb(c, &com_port->thr);
>  }
>
>  #ifndef CONFIG_NS16550_MIN_FUNCTIONS
>  char NS16550_getc (NS16550_t com_port)
>  {
> -       while ((com_port->lsr & UART_LSR_DR) == 0) {
> +       while ((uart_readb(&com_port->lsr) & UART_LSR_DR) == 0) {
>  #ifdef CONFIG_USB_TTY
>                extern void usbtty_poll(void);
>                usbtty_poll();
>  #endif
>        }
> -       return (com_port->rbr);
> +       return uart_readb(&com_port->rbr);
>  }
>
>  int NS16550_tstc (NS16550_t com_port)
>  {
> -       return ((com_port->lsr & UART_LSR_DR) != 0);
> +       return ((uart_readb(&com_port->lsr) & UART_LSR_DR) != 0);
>  }
>
>  #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
> --
> 1.6.4.1.174.g32f4c
>
>