[U-Boot] [PATCH 2/3] fsl_sata: Add the workaround for errata SATA-A001

[Dave Liu]

After power on, the SATA host controller of P1022 Rev1 is configured
in legacy mode instead of the expected enterprise mode.

software needs to clear bit[28] of HControl register to change to
enterprise mode after bringing the host offline.

Signed-off-by: Dave Liu <daveliu at freescale.com>
---
 drivers/block/fsl_sata.c |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c
index abcda6f..d875581 100644
--- a/drivers/block/fsl_sata.c
+++ b/drivers/block/fsl_sata.c
@@ -21,6 +21,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/io.h>
+#include <asm/processor.h>
 #include <malloc.h>
 #include <libata.h>
 #include <fis.h>
@@ -191,6 +192,19 @@ int init_sata(int dev)
 	/* Wait the controller offline */
 	ata_wait_register(&reg->hstatus, HSTATUS_ONOFF, 0, 1000);
 
+#ifdef CONFIG_SYS_P1022_ERRATUM_SATA-A001
+	/* For P1022 Rev1.0 silicon, after power on SATA host
+	 * controller is configured in legacy mode instead of
+	 * the expected enterprise mode. software needs to clear
+	 * bit[28] of HControl register to change to enterprise
+	 * mode from legacy mode.
+	 */
+	if (IS_SVR_REV(get_svr(), 1, 0)) {
+		out_le32(&reg->hstatus, 0x20000000);
+		out_le32(&reg->hcontrol, 0x00000100);
+	}
+#endif
+
 	/* Set the command header base address to CHBA register to tell DMA */
 	out_le32(&reg->chba, (u32)cmd_hdr & ~0x3);
 
-- 
1.6.4