[U-Boot] [PATCH] 85xx: clean up the io_sel for PCI express of P1022

[Dave Liu]

clean up the wrong io_sel for PCI express according to latest manual.

Signed-off-by: Dave Liu <daveliu at freescale.com>
---
 arch/ppc/cpu/mpc8xxx/pci_cfg.c    |   13 ++++++-------
 arch/ppc/include/asm/immap_85xx.h |    5 +++++
 2 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/arch/ppc/cpu/mpc8xxx/pci_cfg.c b/arch/ppc/cpu/mpc8xxx/pci_cfg.c
index 9b7181d..85995ca 100644
--- a/arch/ppc/cpu/mpc8xxx/pci_cfg.c
+++ b/arch/ppc/cpu/mpc8xxx/pci_cfg.c
@@ -176,15 +176,14 @@ static struct pci_info pci_config_info[] =
 			 (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f),
 	},
 	[LAW_TRGT_IF_PCIE_2] = {
-		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) |
-			 (1 << 9) | (1 << 0xa) | (1 << 0xb) | (1 << 0xd) |
-			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
-			 (1 << 0x18) | (1 << 0x1c),
+		.cfg =   (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
+			 (1 << 0xd) | (1 << 0x15) | (1 << 0x16) | (1 << 0x17) |
+			 (1 << 0x18) | (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
 	},
 	[LAW_TRGT_IF_PCIE_3] = {
-		.cfg =   (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xd) |
-			 (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | (1 << 0x18) |
-			 (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b),
+		.cfg =   (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) |
+			 (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | (1 << 0x15) |
+			 (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | (1 << 0x1c),
 	},
 };
 #elif defined(CONFIG_P2010) || defined(CONFIG_P2020)
diff --git a/arch/ppc/include/asm/immap_85xx.h b/arch/ppc/include/asm/immap_85xx.h
index 957ad76..0d6dd54 100644
--- a/arch/ppc/include/asm/immap_85xx.h
+++ b/arch/ppc/include/asm/immap_85xx.h
@@ -1846,8 +1846,13 @@ typedef struct ccsr_gur {
 #define MPC85xx_PORDEVSR_SGMII4_DIS	0x04000000
 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL	0x38000000
 #define MPC85xx_PORDEVSR_PCI1		0x00800000
+#if defined(CONFIG_P1013) || defined(CONFIG_P1022)
+#define MPC85xx_PORDEVSR_IO_SEL		0x007c0000
+#define MPC85xx_PORDEVSR_IO_SEL_SHIFT	18
+#else
 #define MPC85xx_PORDEVSR_IO_SEL		0x00780000
 #define MPC85xx_PORDEVSR_IO_SEL_SHIFT	19
+#endif
 #define MPC85xx_PORDEVSR_PCI2_ARB	0x00040000
 #define MPC85xx_PORDEVSR_PCI1_ARB	0x00020000
 #define MPC85xx_PORDEVSR_PCI1_PCI32	0x00010000
-- 
1.6.4