[U-Boot] [PATCH v3 13/26] [x86] Use CONFIG_SERIAL_MULTI
Graeme Russ
graeme.russ at gmail.com
Fri Apr 23 16:05:47 CEST 2010
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
---
arch/i386/cpu/Makefile | 2 +-
arch/i386/cpu/serial.c | 506 ------------------------------------------------
arch/i386/lib/board.c | 5 +-
board/eNET/eNET.c | 3 +-
common/serial.c | 3 +-
include/configs/eNET.h | 26 ++-
include/serial.h | 3 +-
7 files changed, 32 insertions(+), 516 deletions(-)
delete mode 100644 arch/i386/cpu/serial.c
diff --git a/arch/i386/cpu/Makefile b/arch/i386/cpu/Makefile
index c658c6e..bb0a48f 100644
--- a/arch/i386/cpu/Makefile
+++ b/arch/i386/cpu/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(CPU).a
START = start.o start16.o resetvec.o
-COBJS = serial.o interrupts.o cpu.o
+COBJS = interrupts.o cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/i386/cpu/serial.c b/arch/i386/cpu/serial.c
deleted file mode 100644
index e7025a3..0000000
--- a/arch/i386/cpu/serial.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/*
- * (C) Copyright 2002
- * Daniel Engström, Omicron Ceti AB, daniel at omicron.se
- *
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-/*------------------------------------------------------------------------------+ */
-
-/*
- * This source code is dual-licensed. You may use it under the terms of the
- * GNU General Public License version 2, or under the license below.
- *
- * This source code has been made available to you by IBM on an AS-IS
- * basis. Anyone receiving this source is licensed under IBM
- * copyrights to use it in any way he or she deems fit, including
- * copying it, modifying it, compiling it, and redistributing it either
- * with or without modifications. No license under IBM patents or
- * patent applications is to be implied by the copyright license.
- *
- * Any user of this software should understand that IBM cannot provide
- * technical support for this software and will not be responsible for
- * any consequences resulting from the use of this software.
- *
- * Any person who transfers this source code or any derivative work
- * must include the IBM copyright notice, this paragraph, and the
- * preceding two paragraphs in the transferred software.
- *
- * COPYRIGHT I B M CORPORATION 1995
- * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
- */
-/*------------------------------------------------------------------------------- */
-
-#include <common.h>
-#include <watchdog.h>
-#include <asm/io.h>
-#include <asm/ibmpc.h>
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-#include <malloc.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define UART_RBR 0x00
-#define UART_THR 0x00
-#define UART_IER 0x01
-#define UART_IIR 0x02
-#define UART_FCR 0x02
-#define UART_LCR 0x03
-#define UART_MCR 0x04
-#define UART_LSR 0x05
-#define UART_MSR 0x06
-#define UART_SCR 0x07
-#define UART_DLL 0x00
-#define UART_DLM 0x01
-
-/*-----------------------------------------------------------------------------+
- | Line Status Register.
- +-----------------------------------------------------------------------------*/
-#define asyncLSRDataReady1 0x01
-#define asyncLSROverrunError1 0x02
-#define asyncLSRParityError1 0x04
-#define asyncLSRFramingError1 0x08
-#define asyncLSRBreakInterrupt1 0x10
-#define asyncLSRTxHoldEmpty1 0x20
-#define asyncLSRTxShiftEmpty1 0x40
-#define asyncLSRRxFifoError1 0x80
-
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-/*-----------------------------------------------------------------------------+
- | Fifo
- +-----------------------------------------------------------------------------*/
-typedef struct {
- char *rx_buffer;
- ulong rx_put;
- ulong rx_get;
- int cts;
-} serial_buffer_t;
-
-volatile serial_buffer_t buf_info;
-static int serial_buffer_active=0;
-#endif
-
-
-static int serial_div(int baudrate)
-{
-
- switch (baudrate) {
- case 1200:
- return 96;
- case 9600:
- return 12;
- case 19200:
- return 6;
- case 38400:
- return 3;
- case 57600:
- return 2;
- case 115200:
- return 1;
- }
-
- return 12;
-}
-
-
-/*
- * Minimal serial functions needed to use one of the SMC ports
- * as serial console interface.
- */
-
-int serial_init(void)
-{
- volatile char val;
- int bdiv = serial_div(gd->baudrate);
-
- outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */
- outb(bdiv, UART0_BASE + UART_DLL); /* set baudrate divisor */
- outb(bdiv >> 8, UART0_BASE + UART_DLM);/* set baudrate divisor */
- outb(0x03, UART0_BASE + UART_LCR); /* clear DLAB; set 8 bits, no parity */
- outb(0x01, UART0_BASE + UART_FCR); /* enable FIFO */
- outb(0x0b, UART0_BASE + UART_MCR); /* Set DTR and RTS active */
- val = inb(UART0_BASE + UART_LSR); /* clear line status */
- val = inb(UART0_BASE + UART_RBR); /* read receive buffer */
- outb(0x00, UART0_BASE + UART_SCR); /* set scratchpad */
- outb(0x00, UART0_BASE + UART_IER); /* set interrupt enable reg */
-
- return 0;
-}
-
-
-void serial_setbrg(void)
-{
- unsigned short bdiv;
-
- bdiv = serial_div(gd->baudrate);
-
- outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */
- outb(bdiv&0xff, UART0_BASE + UART_DLL); /* set baudrate divisor */
- outb(bdiv >> 8, UART0_BASE + UART_DLM);/* set baudrate divisor */
- outb(0x03, UART0_BASE + UART_LCR); /* clear DLAB; set 8 bits, no parity */
-}
-
-
-void serial_putc(const char c)
-{
- int i;
-
- if (c == '\n')
- serial_putc ('\r');
-
- /* check THRE bit, wait for transmiter available */
- for (i = 1; i < 3500; i++) {
- if ((inb (UART0_BASE + UART_LSR) & 0x20) == 0x20) {
- break;
- }
- udelay(100);
- }
- outb(c, UART0_BASE + UART_THR); /* put character out */
-}
-
-
-void serial_puts(const char *s)
-{
- while (*s) {
- serial_putc(*s++);
- }
-}
-
-
-int serial_getc(void)
-{
- unsigned char status = 0;
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- if (serial_buffer_active) {
- return serial_buffered_getc();
- }
-#endif
-
- while (1) {
-#if defined(CONFIG_HW_WATCHDOG)
- WATCHDOG_RESET(); /* Reset HW Watchdog, if needed */
-#endif /* CONFIG_HW_WATCHDOG */
- status = inb(UART0_BASE + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0) {
- break;
- }
- if ((status & ( asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- outb(asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1, UART0_BASE + UART_LSR);
- }
- }
- return (0x000000ff & (int) inb (UART0_BASE));
-}
-
-
-int serial_tstc(void)
-{
- unsigned char status;
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
- if (serial_buffer_active) {
- return serial_buffered_tstc();
- }
-#endif
-
- status = inb(UART0_BASE + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0) {
- return (1);
- }
- if ((status & ( asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- outb(asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1, UART0_BASE + UART_LSR);
- }
- return 0;
-}
-
-
-#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
-
-void serial_isr(void *arg)
-{
- int space;
- int c;
- int rx_put = buf_info.rx_put;
-
- if (buf_info.rx_get <= rx_put) {
- space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - buf_info.rx_get);
- } else {
- space = buf_info.rx_get - rx_put;
- }
-
- while (inb(UART0_BASE + UART_LSR) & 1) {
- c = inb(UART0_BASE);
- if (space) {
- buf_info.rx_buffer[rx_put++] = c;
- space--;
-
- if (rx_put == buf_info.rx_get) {
- buf_info.rx_get++;
- if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO) {
- buf_info.rx_get = 0;
- }
- }
-
- if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO) {
- rx_put = 0;
- if (0 == buf_info.rx_get) {
- buf_info.rx_get = 1;
- }
-
- }
-
- }
- if (space < CONFIG_SERIAL_SOFTWARE_FIFO / 4) {
- /* Stop flow by setting RTS inactive */
- outb(inb(UART0_BASE + UART_MCR) & (0xFF ^ 0x02),
- UART0_BASE + UART_MCR);
- }
- }
- buf_info.rx_put = rx_put;
-}
-
-void serial_buffered_init(void)
-{
- serial_puts ("Switching to interrupt driven serial input mode.\n");
- buf_info.rx_buffer = malloc (CONFIG_SERIAL_SOFTWARE_FIFO);
- buf_info.rx_put = 0;
- buf_info.rx_get = 0;
-
- if (inb (UART0_BASE + UART_MSR) & 0x10) {
- serial_puts ("Check CTS signal present on serial port: OK.\n");
- buf_info.cts = 1;
- } else {
- serial_puts ("WARNING: CTS signal not present on serial port.\n");
- buf_info.cts = 0;
- }
-
- irq_install_handler ( VECNUM_U0 /*UART0 */ /*int vec */ ,
- serial_isr /*interrupt_handler_t *handler */ ,
- (void *) &buf_info /*void *arg */ );
-
- /* Enable "RX Data Available" Interrupt on UART */
- /* outb(inb(UART0_BASE + UART_IER) |0x01, UART0_BASE + UART_IER); */
- outb(0x01, UART0_BASE + UART_IER);
-
- /* Set DTR and RTS active, enable interrupts */
- outb(inb (UART0_BASE + UART_MCR) | 0x0b, UART0_BASE + UART_MCR);
-
- /* Setup UART FIFO: RX trigger level: 1 byte, Enable FIFO */
- outb( /*(1 << 6) |*/ 1, UART0_BASE + UART_FCR);
-
- serial_buffer_active = 1;
-}
-
-void serial_buffered_putc (const char c)
-{
- int i;
- /* Wait for CTS */
-#if defined(CONFIG_HW_WATCHDOG)
- while (!(inb (UART0_BASE + UART_MSR) & 0x10))
- WATCHDOG_RESET ();
-#else
- if (buf_info.cts) {
- for (i=0;i<1000;i++) {
- if ((inb (UART0_BASE + UART_MSR) & 0x10)) {
- break;
- }
- }
- if (i!=1000) {
- buf_info.cts = 0;
- }
- } else {
- if ((inb (UART0_BASE + UART_MSR) & 0x10)) {
- buf_info.cts = 1;
- }
- }
-
-#endif
- serial_putc (c);
-}
-
-void serial_buffered_puts(const char *s)
-{
- serial_puts (s);
-}
-
-int serial_buffered_getc(void)
-{
- int space;
- int c;
- int rx_get = buf_info.rx_get;
- int rx_put;
-
-#if defined(CONFIG_HW_WATCHDOG)
- while (rx_get == buf_info.rx_put)
- WATCHDOG_RESET ();
-#else
- while (rx_get == buf_info.rx_put);
-#endif
- c = buf_info.rx_buffer[rx_get++];
- if (rx_get == CONFIG_SERIAL_SOFTWARE_FIFO) {
- rx_get = 0;
- }
- buf_info.rx_get = rx_get;
-
- rx_put = buf_info.rx_put;
- if (rx_get <= rx_put) {
- space = CONFIG_SERIAL_SOFTWARE_FIFO - (rx_put - rx_get);
- } else {
- space = rx_get - rx_put;
- }
- if (space > CONFIG_SERIAL_SOFTWARE_FIFO / 2) {
- /* Start flow by setting RTS active */
- outb(inb (UART0_BASE + UART_MCR) | 0x02, UART0_BASE + UART_MCR);
- }
-
- return c;
-}
-
-int serial_buffered_tstc(void)
-{
- return (buf_info.rx_get != buf_info.rx_put) ? 1 : 0;
-}
-
-#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
-
-
-#if defined(CONFIG_CMD_KGDB)
-/*
- AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
- number 0 or number 1
- - if CONFIG_KGDB_SER_INDEX = 1 => serial port number 0 :
- configuration has been already done
- - if CONFIG_KGDB_SER_INDEX = 2 => serial port number 1 :
- configure port 1 for serial I/O with rate = CONFIG_KGDB_BAUDRATE
-*/
-#if (CONFIG_KGDB_SER_INDEX & 2)
-void kgdb_serial_init(void)
-{
- volatile char val;
- bdiv = serial_div (CONFIG_KGDB_BAUDRATE);
-
- /*
- * Init onboard 16550 UART
- */
- outb(0x80, UART1_BASE + UART_LCR); /* set DLAB bit */
- outb((bdiv & 0xff), UART1_BASE + UART_DLL); /* set divisor for 9600 baud */
- outb((bdiv >> 8 ), UART1_BASE + UART_DLM); /* set divisor for 9600 baud */
- outb(0x03, UART1_BASE + UART_LCR); /* line control 8 bits no parity */
- outb(0x00, UART1_BASE + UART_FCR); /* disable FIFO */
- outb(0x00, UART1_BASE + UART_MCR); /* no modem control DTR RTS */
- val = inb(UART1_BASE + UART_LSR); /* clear line status */
- val = inb(UART1_BASE + UART_RBR); /* read receive buffer */
- outb(0x00, UART1_BASE + UART_SCR); /* set scratchpad */
- outb(0x00, UART1_BASE + UART_IER); /* set interrupt enable reg */
-}
-
-
-void putDebugChar(const char c)
-{
- if (c == '\n')
- serial_putc ('\r');
-
- outb(c, UART1_BASE + UART_THR); /* put character out */
-
- /* check THRE bit, wait for transfer done */
- while ((inb(UART1_BASE + UART_LSR) & 0x20) != 0x20);
-}
-
-
-void putDebugStr(const char *s)
-{
- while (*s) {
- serial_putc(*s++);
- }
-}
-
-
-int getDebugChar(void)
-{
- unsigned char status = 0;
-
- while (1) {
- status = inb(UART1_BASE + UART_LSR);
- if ((status & asyncLSRDataReady1) != 0x0) {
- break;
- }
- if ((status & ( asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1 )) != 0) {
- outb(asyncLSRFramingError1 |
- asyncLSROverrunError1 |
- asyncLSRParityError1 |
- asyncLSRBreakInterrupt1, UART1_BASE + UART_LSR);
- }
- }
- return (0x000000ff & (int) inb(UART1_BASE));
-}
-
-
-void kgdb_interruptible(int yes)
-{
- return;
-}
-
-#else /* ! (CONFIG_KGDB_SER_INDEX & 2) */
-
-void kgdb_serial_init(void)
-{
- serial_printf ("[on serial] ");
-}
-
-void putDebugChar(int c)
-{
- serial_putc (c);
-}
-
-void putDebugStr(const char *str)
-{
- serial_puts (str);
-}
-
-int getDebugChar(void)
-{
- return serial_getc ();
-}
-
-void kgdb_interruptible(int yes)
-{
- return;
-}
-#endif /* (CONFIG_KGDB_SER_INDEX & 2) */
-#endif
diff --git a/arch/i386/lib/board.c b/arch/i386/lib/board.c
index 947a8ec..7115a2f 100644
--- a/arch/i386/lib/board.c
+++ b/arch/i386/lib/board.c
@@ -37,6 +37,7 @@
#include <malloc.h>
#include <net.h>
#include <ide.h>
+#include <serial.h>
#include <asm/u-boot-i386.h>
#include <elf.h>
@@ -149,7 +150,6 @@ static void display_flash_config (ulong size)
typedef int (init_fnc_t) (void);
init_fnc_t *init_sequence[] = {
- serial_init,
cpu_init_r, /* basic cpu dependent setup */
board_early_init_r, /* basic board dependent setup */
dram_init, /* configure available RAM banks */
@@ -277,6 +277,9 @@ void board_init_r(gd_t *id, ulong dest_addr)
}
show_boot_progress(0x23);
+#ifdef CONFIG_SERIAL_MULTI
+ serial_initialize();
+#endif
/* configure available FLASH banks */
size = flash_init();
display_flash_config(size);
diff --git a/board/eNET/eNET.c b/board/eNET/eNET.c
index f794beb..52ea140 100644
--- a/board/eNET/eNET.c
+++ b/board/eNET/eNET.c
@@ -111,8 +111,9 @@ int board_early_init_f(void)
writew(0x0615, &sc520_mmcr->romcs1ctl);
writew(0x0615, &sc520_mmcr->romcs2ctl);
- writeb(0x02, &sc520_mmcr->adddecctl);
+ writeb(0x00, &sc520_mmcr->adddecctl);
writeb(0x07, &sc520_mmcr->uart1ctl);
+ writeb(0x07, &sc520_mmcr->uart2ctl);
writeb(0x06, &sc520_mmcr->sysarbctl);
writew(0x0003, &sc520_mmcr->sysarbmenb);
diff --git a/common/serial.c b/common/serial.c
index 5f9ffd7..d4a632b 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void)
#elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \
|| defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \
|| defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) \
- || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+ || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
+ || defined(CONFIG_SYS_SC520)
#if defined(CONFIG_CONS_INDEX) && defined(CONFIG_SYS_NS16550_SERIAL)
#if (CONFIG_CONS_INDEX==1)
return &eserial1_device;
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 6a68bf4..05d7db8 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -21,6 +21,7 @@
* MA 02111-1307 USA
*/
+#include <asm/ibmpc.h>
/*
* board/config.h - configuration options, board specific
*/
@@ -55,6 +56,26 @@
#undef CONFIG_HW_WATCHDOG
/*-----------------------------------------------------------------------
+ * Serial Configuration
+ */
+#define CONFIG_SERIAL_MULTI
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK 1843200
+#define CONFIG_BAUDRATE 9600
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+
+#define CONFIG_SYS_NS16550_COM1 UART0_BASE
+#define CONFIG_SYS_NS16550_COM2 UART1_BASE
+#define CONFIG_SYS_NS16550_COM3 (0x1000 + UART0_BASE)
+#define CONFIG_SYS_NS16550_COM4 (0x1000 + UART1_BASE)
+#define CONFIG_SYS_NS16550_PORT_MAPPED
+
+ /*-----------------------------------------------------------------------
* Video Configuration
*/
#undef CONFIG_VIDEO /* No Video Hardware */
@@ -65,8 +86,6 @@
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_BAUDRATE 9600
-
/*-----------------------------------------------------------------------
* Command line configuration.
*/
@@ -123,9 +142,6 @@
#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
/*-----------------------------------------------------------------------
* SDRAM Configuration
*/
diff --git a/include/serial.h b/include/serial.h
index f2638ec..aa87a93 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -25,7 +25,8 @@ extern struct serial_device * default_serial_console (void);
#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || \
defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \
defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) || \
- defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+ defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \
+ defined(CONFIG_SYS_SC520)
extern struct serial_device serial0_device;
extern struct serial_device serial1_device;
#if defined(CONFIG_SYS_NS16550_SERIAL)
--
1.7.1.rc1.12.ga601
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