[U-Boot] da850/L138 SPI flash transfer speed

[Nori, Sekhar]

On Sat, Apr 24, 2010 at 03:59:22, Wolfgang Denk wrote:
> Dear Delio Brignoli,
>
> please mind the NetiQuette and restrict your line length to some 70
> charatcers or so.  Thanks.
>
> In message <4D573595-069A-4490-AF2D-38ED3AAD70EB at audioscience.com> you wrote:
> >
> > I am working on reducing boot time on an L138 EVM and SPI flash transfer speed is currently the worst offender. U-Boot transfers from the SPI flash at 0.6Mbytes/s, this a lot slower than I would expect for a 50MHz SPI clock. Using a scope we found that
> > the chip select is active throughout the transfer (as expected), we see ~160ns bursts of activity on the clock line for each byte transferred (8 bits @ 50MHz) with 1us idle periods in between. Where does the 1us delay between byte transfers come from? I
> > s reading data bytes from the SPI registers very slow or is writing to RAM one byte at a time slowing the transfer?
>
> Everything is slow as caches are not enabled.

The only delays being configured in the driver are the
chip-select hold time delays which should not matter
here as you see delays inserted between bytes which
are part of a single transfer. I am starting to doubt
peripheral mis-configuration as a possible cause here.

One way to mitigate the slow access to RAM would be to
take advantage of external RAM burst by using EDMA. That
will be some work because there is no other example of
EDMA usage in U-Boot.

Thanks,
Sekhar