[U-Boot] [PATCH] mpc83xx: remove some dead code, saving space
Scott Wood
scottwood at freescale.com
Wed Dec 1 01:21:36 CET 2010
On Tue, 30 Nov 2010 22:25:11 +0100
Joakim Tjernlund <joakim.tjernlund at transmode.se> wrote:
> Scott Wood <scottwood at freescale.com> wrote on 2010/11/30 22:17:31:
> >
> > On Tue, 30 Nov 2010 22:13:32 +0100
> > Joakim Tjernlund <joakim.tjernlund at transmode.se> wrote:
> >
> > > Scott Wood <scottwood at freescale.com> wrote on 2010/11/30 21:50:52:
> > > >
> > > > On Tue, 30 Nov 2010 21:45:19 +0100
> > > > Joakim Tjernlund <joakim.tjernlund at transmode.se> wrote:
> > > >
> > > > > On a related note, I am not sure why the I and D cache needs to be flushed,
> > > > > aren't they coherent?
> > > >
> > > > They are not.
> > >
> > > Ah, I figured they would be these days.
> >
> > Nope, I've seen weird stuff happen when I forget to sync the icache
> > even on very recent chips (albeit 85xx and not 83xx).
> >
> > > I doubt one needs to invalidate the icache though?
> > > Better safe than sorry I guess, one could probably optimize it a
> > > little bit though.
> >
> > You need to flush the dcache and then invalidate the icache.
>
> but if one haven't executed any insn's at the new location yet
> there should not be any cache lines in the icache that
> match the new location.
Ah. That's a special case. :-)
Still, better to set a good example.
-Scott
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