[U-Boot] [PATCH] p1022ds: fix switching of DIU/LBC signals

[Scott Wood]

On Tue, 30 Nov 2010 18:36:25 -0600
Timur Tabi <timur at freescale.com> wrote:

> @@ -244,8 +266,15 @@ void flash_write64(u64 value, void *addr)
>  
>  	/* There is no __raw_writeq(), so do the write manually */
>  	*(volatile u64 *)addr = value;
> -	if (sw)
> +	if (sw) {
> +		/*
> +		 * To ensure the post-write is completed to eLBC, software must
> +		 * perform a dummy read from one valid address from eLBC space
> +		 * before changing the eLBC_DIU from NOR mode to DIU mode.
> +		 */
> +		__raw_readb(addr);
>  		set_mux_to_diu();
> +	}

Careful with the barriers.

You've got a raw readback, which means it's not going to wait for
completion with the twi/isync hack.

Ordinarily that would be OK, since you only need ordering between the
readb and the first access in set_mux_to_diu().  Unfortunately, that
first access is an 8-bit access, which for some strange reason does
sync differently than 16/32-bit accesses.  The latter do sync+write,
but 8-bit does write+eieio.  So there's no barrier between the read
and the write.

-Scott