[U-Boot] [PATCH v3 3/7] [REPOST] add Multi Function Pin configuration support for ARMADA100
Prafulla Wadaskar
prafulla at marvell.com
Thu Dec 2 16:11:35 CET 2010
This patch adds the support MFP support for Marvell ARMADA100 SoCs
Signed-off-by: Prafulla Wadaskar <prafulla at marvell.com>
---
Change log v3 REPOST:
macro MFPR_PTR_UPDATE added
arch/arm/include/asm/arch-armada100/mfp.h | 231 +++++++++++++++++++++++++++++
1 files changed, 231 insertions(+), 0 deletions(-)
create mode 100755 arch/arm/include/asm/arch-armada100/mfp.h
diff --git a/arch/arm/include/asm/arch-armada100/mfp.h b/arch/arm/include/asm/arch-armada100/mfp.h
new file mode 100755
index 0000000..f77055c
--- /dev/null
+++ b/arch/arm/include/asm/arch-armada100/mfp.h
@@ -0,0 +1,231 @@
+/*
+ * Based on linux/arch/arm/mach-mpp/include/mfp-pxa168.h
+ * (C) Copyright 2007
+ * Marvell Semiconductor <www.marvell.com>
+ * 2007-08-21: eric miao <eric.miao at marvell.com>
+ *
+ * (C) Copyright 2010
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla at marvell.com>
+ * Contributor: Mahavir Jain <mjain at marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __ARMADA100_MFP_H
+#define __ARMADA100_MFP_H
+
+/*
+ * On ARMADA100, (Ref: Specs: A1.1)
+ * the offset address are divided in three regions and are not
+ * consecutive, this macro updates the same
+ */
+#define MFPR_PTR_UPDATE(ptr, no) \
+ if (no < 37) \
+ ptr += (0x004c / 4) + no; \
+ else if ( no >= 56) \
+ ptr += (0x00e0 / 4) + (no - 56);\
+ else \
+ ptr += (no - 37);
+
+/* By default Pin Drive is set to medium */
+#define MFPD(x) MFP(x) | MFP_DRIVE(MEDIUM)
+
+/* GPIOs */
+#define GPIOAF(x) (if (x <= 15) ? 5 : \
+ if (x == 16) ? 0 : \
+ if (x == 17) ? 5 : \
+ if (x == 18) ? 0 : \
+ if (x == 19) ? 5 : \
+ if (x == 20) ? 0 : \
+ if (x <= 25) ? 5 : \
+ if (x == 26) ? 0 : \
+ if (x == 33) ? 5 : 0)
+
+#define MFP_GPIO(x) MFPD(x) | MFP_AF(GPIOAF(x))
+
+/* UART2 */
+#define MFP47_UART2_RXD MFPD(47) | MFP_AF(6)
+#define MFP48_UART2_TXD MFPD(48) | MFP_AF(6)
+#define MFP88_UART2_RXD MFPD(88) | MFP_AF(2)
+#define MFP89_UART2_TXD MFPD(89) | MFP_AF(2)
+
+/* UART3 */
+#define GPIO8_UART3_RXD MFPD(8) | MFP_AF(2)
+#define GPIO9_UART3_TXD MFPD(9) | MFP_AF(2)
+
+/* MFU */
+#define MFP86_TX_CLK MFPD(86) | MFP_AF(5)
+#define MFP87_TX_EN MFPD(87) | MFP_AF(5)
+#define MFP88_TX_DQ3 MFPD(88) | MFP_AF(5)
+#define MFP89_TX_DQ2 MFPD(89) | MFP_AF(5)
+#define MFP90_TX_DQ1 MFPD(90) | MFP_AF(5)
+#define MFP91_TX_DQ0 MFPD(91) | MFP_AF(5)
+#define MFP92_MII_CRS MFPD(92) | MFP_AF(5)
+#define MFP93_MII_COL MFPD(93) | MFP_AF(5)
+#define MFP94_RX_CLK MFPD(94) | MFP_AF(5)
+#define MFP95_RX_ER MFPD(95) | MFP_AF(5)
+#define MFP96_RX_DQ3 MFPD(96) | MFP_AF(5)
+#define MFP97_RX_DQ2 MFPD(97) | MFP_AF(5)
+#define MFP98_RX_DQ1 MFPD(98) | MFP_AF(5)
+#define MFP99_RX_DQ0 MFPD(99) | MFP_AF(5)
+#define MFP100_MII_MDC MFPD(100) | MFP_AF(5)
+#define MFP101_MII_MDIO MFPD(101) | MFP_AF(5)
+#define MFP103_RX_DV MFPD(103) | MFP_AF(5)
+
+/* SSP2*/
+#define MFP107_SPI_NOR_RXD MFPD(107) | MFP_AF(4)
+#define MFP108_SPI_NOR_TXD MFPD(108) | MFP_AF(4)
+#define MFP109_SPI_NOR_SYSCLK MFPD(109) | MFP_AF(4)
+#define MFP111_SPI_NOR_CLK MFPD(111) | MFP_AF(4)
+
+/* DFI */
+#define MFP0_DFI_D15 MFPD(0) | MFP_AF(0)
+#define MFP1_DFI_D14 MFPD(1) | MFP_AF(0)
+#define MFP2_DFI_D13 MFPD(2) | MFP_AF(0)
+#define MFP3_DFI_D12 MFPD(3) | MFP_AF(0)
+#define MFP4_DFI_D11 MFPD(4) | MFP_AF(0)
+#define MFP5_DFI_D10 MFPD(5) | MFP_AF(0)
+#define MFP6_DFI_D9 MFPD(6) | MFP_AF(0)
+#define MFP7_DFI_D8 MFPD(7) | MFP_AF(0)
+#define MFP8_DFI_D7 MFPD(8) | MFP_AF(0)
+#define MFP9_DFI_D6 MFPD(9) | MFP_AF(0)
+#define MFP10_DFI_D5 MFPD(10) | MFP_AF(0)
+#define MFP11_DFI_D4 MFPD(11) | MFP_AF(0)
+#define MFP12_DFI_D3 MFPD(12) | MFP_AF(0)
+#define MFP13_DFI_D2 MFPD(13) | MFP_AF(0)
+#define MFP14_DFI_D1 MFPD(14) | MFP_AF(0)
+#define MFP15_DFI_D0 MFPD(15) | MFP_AF(0)
+
+#define MFP30_DFI_ADDR0 MFPD(30) | MFP_AF(0)
+#define MFP31_DFI_ADDR1 MFPD(31) | MFP_AF(0)
+#define MFP32_DFI_ADDR2 MFPD(32) | MFP_AF(0)
+#define MFP33_DFI_ADDR3 MFPD(33) | MFP_AF(0)
+
+/* NAND */
+#define MFP16_ND_nCS0 MFPD(16) | MFP_AF(1)
+#define MFP17_ND_nWE MFPD(17) | MFP_AF(0)
+#define MFP21_ND_ALE MFPD(21) | MFP_AF(0)
+#define MFP22_ND_CLE MFPD(22) | MFP_AF(0)
+#define MFP24_ND_nRE MFPD(24) | MFP_AF(0)
+#define MFP26_ND_RnB1 MFPD(26) | MFP_AF(1)
+#define MFP27_ND_RnB2 MFPD(27) | MFP_AF(1)
+
+/* Static Memory Controller */
+#define MFP18_SMC_nCS0 MFPD(18) | MFP_AF(3)
+#define MFP18_SMC_nCS1 MFPD(18) | MFP_AF(2)
+#define MFP16_SMC_nCS0 MFPD(16) | MFP_AF(2)
+#define MFP16_SMC_nCS1 MFPD(16) | MFP_AF(3)
+#define MFP19_SMC_nCS0 MFPD(19) | MFP_AF(0)
+#define MFP20_SMC_nCS1 MFPD(20) | MFP_AF(2)
+#define MFP23_SMC_nLUA MFPD(23) | MFP_AF(0)
+#define MFP25_SMC_nLLA MFPD(25) | MFP_AF(0)
+#define MFP27_SMC_IRQ MFPD(27) | MFP_AF(0)
+#define MFP28_SMC_RDY MFPD(28) | MFP_AF(0)
+#define MFP29_SMC_SCLK MFPD(29) | MFP_AF(0)
+#define MFP34_SMC_nCS1 MFPD(34) | MFP_AF(2)
+#define MFP35_SMC_BE1 MFPD(35) | MFP_AF(2)
+#define MFP36_SMC_BE2 MFPD(36) | MFP_AF(2)
+
+/* Compact Flash */
+#define MFP19_CF_nCE1 MFPD(19) | MFP_AF(3)
+#define MFP20_CF_nCE2 MFPD(20) | MFP_AF(3)
+#define MFP23_CF_nALE MFPD(23) | MFP_AF(3)
+#define MFP25_CF_nRESET MFPD(25) | MFP_AF(3)
+#define MFP28_CF_RDY MFPD(28) | MFP_AF(3)
+#define MFP29_CF_STSCH MFPD(29) | MFP_AF(3)
+#define MFP30_CF_nREG MFPD(30) | MFP_AF(3)
+#define MFP31_CF_nIOIS16 MFPD(31) | MFP_AF(3)
+#define MFP32_CF_nCD1 MFPD(32) | MFP_AF(3)
+#define MFP33_CF_nCD2 MFPD(33) | MFP_AF(3)
+
+/* UART1 */
+#define MFP107_UART1_TXD MFP(107) | MFP_AF(1) | MFP_DRIVE(FAST)
+#define MFP107_UART1_RXD MFP(107) | MFP_AF(2) | MFP_DRIVE(FAST)
+#define MFP108_UART1_RXD MFP(108) | MFP_AF(1) | MFP_DRIVE(FAST)
+#define MFP108_UART1_TXD MFP(108) | MFP_AF(2) | MFP_DRIVE(FAST)
+#define MFP109_UART1_CTS MFPD(109) | MFP_AF(1)
+#define MFP109_UART1_RTS MFPD(109) | MFP_AF(2)
+#define MFP110_UART1_RTS MFPD(110) | MFP_AF(1)
+#define MFP110_UART1_CTS MFPD(110) | MFP_AF(2)
+#define MFP111_UART1_RI MFPD(111) | MFP_AF(1)
+#define MFP111_UART1_DSR MFPD(111) | MFP_AF(2)
+#define MFP112_UART1_DTR MFPD(111) | MFP_AF(1)
+#define MFP112_UART1_DCD MFPD(112) | MFP_AF(2)
+
+/* MMC1 */
+#define MFP37_MMC1_DAT7 MFPD(37) | MFP_AF(1)
+#define MFP38_MMC1_DAT6 MFPD(38) | MFP_AF(1)
+#define MFP54_MMC1_DAT5 MFPD(54) | MFP_AF(1)
+#define MFP48_MMC1_DAT4 MFPD(48) | MFP_AF(1)
+#define MFP51_MMC1_DAT3 MFPD(51) | MFP_AF(1)
+#define MFP52_MMC1_DAT2 MFPD(52) | MFP_AF(1)
+#define MFP40_MMC1_DAT1 MFPD(40) | MFP_AF(1)
+#define MFP41_MMC1_DAT0 MFPD(41) | MFP_AF(1)
+#define MFP49_MMC1_CMD MFPD(49) | MFP_AF(1)
+#define MFP43_MMC1_CLK MFPD(43) | MFP_AF(1)
+#define MFP53_MMC1_CD MFPD(53) | MFP_AF(1)
+#define MFP46_MMC1_WP MFPD(46) | MFP_AF(1)
+
+/* LCD */
+#define MFP84_LCD_CS MFPD(84) | MFP_AF(1)
+#define MFP60_LCD_DD0 MFPD(60) | MFP_AF(1)
+#define MFP61_LCD_DD1 MFPD(61) | MFP_AF(1)
+#define MFP70_LCD_DD10 MFPD(70) | MFP_AF(1)
+#define MFP71_LCD_DD11 MFPD(71) | MFP_AF(1)
+#define MFP72_LCD_DD12 MFPD(72) | MFP_AF(1)
+#define MFP73_LCD_DD13 MFPD(73) | MFP_AF(1)
+#define MFP74_LCD_DD14 MFPD(74) | MFP_AF(1)
+#define MFP75_LCD_DD15 MFPD(75) | MFP_AF(1)
+#define MFP76_LCD_DD16 MFPD(76) | MFP_AF(1)
+#define MFP77_LCD_DD17 MFPD(77) | MFP_AF(1)
+#define MFP78_LCD_DD18 MFPD(78) | MFP_AF(1)
+#define MFP79_LCD_DD19 MFPD(79) | MFP_AF(1)
+#define MFP62_LCD_DD2 MFPD(62) | MFP_AF(1)
+#define MFP80_LCD_DD20 MFPD(80) | MFP_AF(1)
+#define MFP81_LCD_DD21 MFPD(81) | MFP_AF(1)
+#define MFP82_LCD_DD22 MFPD(82) | MFP_AF(1)
+#define MFP83_LCD_DD23 MFPD(83) | MFP_AF(1)
+#define MFP63_LCD_DD3 MFPD(63) | MFP_AF(1)
+#define MFP64_LCD_DD4 MFPD(64) | MFP_AF(1)
+#define MFP65_LCD_DD5 MFPD(65) | MFP_AF(1)
+#define MFP66_LCD_DD6 MFPD(66) | MFP_AF(1)
+#define MFP67_LCD_DD7 MFPD(67) | MFP_AF(1)
+#define MFP68_LCD_DD8 MFPD(68) | MFP_AF(1)
+#define MFP69_LCD_DD9 MFPD(69) | MFP_AF(1)
+#define MFP59_LCD_DENA_BIAS MFPD(59) | MFP_AF(1)
+#define MFP56_LCD_FCLK_RD MFPD(56) | MFP_AF(1)
+#define MFP57_LCD_LCLK_A0 MFPD(57) | MFP_AF(1)
+#define MFP58_LCD_PCLK_WR MFPD(58) | MFP_AF(1)
+#define MFP85_LCD_VSYNC MFPD(85) | MFP_AF(1)
+
+/* I2C */
+#define MFP105_CI2C_SDA MFPD(105) | MFP_AF(1)
+#define MFP106_CI2C_SCL MFPD(106) | MFP_AF(1)
+
+/* I2S */
+#define MFP113_I2S_MCLK MFPD(113), MFP_AF(6)
+#define MFP114_I2S_FRM MFPD(114), MFP_AF(1)
+#define MFP115_I2S_BCLK MFPD(115), MFP_AF(1)
+#define MFP116_I2S_RXD MFPD(116), MFP_AF(2)
+#define MFP117_I2S_TXD MFPD(117), MFP_AF(2)
+
+#define MFP_PIN_MAX 117
+
+#endif /* __ARMADA100_MFP_H */
--
1.5.3.4
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