[U-Boot] [PATCH 2/3 v3] S5PC100: Function to configure the SROMC registers.
Naveen Krishna Ch
naveenkrishna.ch at gmail.com
Tue Feb 23 09:52:20 CET 2010
Hi Kang,
Thanks for your comments.
Let me know in case of other comments.
I will incorporate them in v4 patch set and send this evening.
On 23 February 2010 14:02, Minkyu Kang <promsoft at gmail.com> wrote:
> Dear Naveen Krishna CH,
>
> On 19 February 2010 19:23, <ch.naveen at samsung.com> wrote:
> > From: Naveen Krishna CH <ch.naveen at samsung.com>
> >
> > Nand Flash, Ethernet, other features might need to configure the
> > SROMC registers accordingly.
> > The config_sromc() functions helps with this.
> >
> > Signed-off-by: Naveen Krishna Ch <ch.naveen at samsung.com>
> > ---
> > Changes since V1:
> >
> > 1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc().
> > Comments from Minkyu Kang are fixed
> >
> > Changes since V2:
> >
> > 1.cpu_is_s5pc100() function is used instead of Macros.
> >
> > cpu/arm_cortexa8/s5pc1xx/Makefile | 1 +
> > cpu/arm_cortexa8/s5pc1xx/sromc.c | 53
> ++++++++++++++++++++++++++++++++++++
> > include/asm-arm/arch-s5pc1xx/smc.h | 3 ++
> > 3 files changed, 57 insertions(+), 0 deletions(-)
> > create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
> >
> > diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
> b/cpu/arm_cortexa8/s5pc1xx/Makefile
> > index 4f922e6..0a6a9b4 100644
> > --- a/cpu/arm_cortexa8/s5pc1xx/Makefile
> > +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
> > @@ -34,6 +34,7 @@ SOBJS += reset.o
> > COBJS += clock.o
> > COBJS += cpu_info.o
> > COBJS += timer.o
> > +COBJS += sromc.o
>
> Please sort this lists alphabetically.
>
> Thanks
> Minkyu Kang
> --
> from. prom.
> www.promsoft.net
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--
Shine bright,
(: Naveen Krishna Ch :)
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