[U-Boot] Linking some code to internal SRAM instead of SDRAM
Alexander Stein
alexander.stein at systec-electronic.com
Wed Jun 16 10:18:48 CEST 2010
Hello,
I have an at91 based board which starts from NOR flash. I have an ugly
workaround in lowlevel_init.S that switching from slowclock to PLLA is done
from the internal SRAM instead directly from NOR which is not possible as the
NOR flash timing are also affected. So i copied some data around using
existing an new labels.
A new approach would be to link lowlevel_init directly at 0x00200000 (which is
AT91SAM9260_SRAM0_BASE) but the code is located next to the "normal" .text
segment. I've prepared a change to cpu/arm926ejs/u-boot.lds (I know it's still
2010.3 but that shouldn't matter now) which links lowlevel_init to 0x00200000.
I added the symbols __lowlevel_init_start and __lowlevel_init_end to be used
to copy the function from it's LMA to it's VMA address.
I'm rather unsure if this will work as I thought, Of course more has to be
done, like
* Make SRAM address configureable
* Only link to this if CONFIG_SKIP_LOWLEVEL_INIT is not defined
* Maybe create a region for that
* ...
Any opinions, hints, more elegant methods?
diff --git a/cpu/arm926ejs/u-boot.lds b/cpu/arm926ejs/u-boot.lds
index ee5eeb5..c368822 100644
--- a/cpu/arm926ejs/u-boot.lds
+++ b/cpu/arm926ejs/u-boot.lds
@@ -32,9 +32,16 @@ SECTIONS
.text :
{
cpu/arm926ejs/start.o (.text)
+ *(EXCLUDE_FILE(*lowlevel_init.o) .text)
+ }
+ __lowlevel_init_start = .;
+ .lowlevel_init 0x00200000 : AT ( ADDR (.text) + SIZEOF (.text) )
+ {
*(.text)
}
+ __lowlevel_init_end = .;
+ . = ADDR (.text) + SIZEOF (.text) + SIZEOF(.lowlevel_init);
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
Best regards
Alexander
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