[U-Boot] mpc8343: TSEC1 @ RGMII stopped working

[André Schwarz]

Kim,


> Wolfgang's master.
ok - so do I :

U-Boot 2010.06-rc2-00039-g29cf267-dirty (Jun 23 2010 - 07:49:01) MPC83XX

Reset Status:

CPU:   e300c1, MPC8343A, Rev: 3.0 at 400 MHz, CSB: 266.667 MHz
....

> [snip]
> > 
> > This is already present in current master.
> 
> right, but both of you didn't give enough version data in your initial
> postings for me to know whether it was included - you mentioned you
> were on 2010.3, whereas this commit is v2010.03-334-g71bd860, i.e. 334
> commmits after the 2010.3 release.

ok - sorry for that.

> 
> btw, the u-boot banner gives the sha on which it is based - e.g., mine
> above is based on commit 1f24126.

ahh ... I see.

> 
> > > Upgrade to ToT?  Start a git bisect?  on drivers/net/tsec.c?
> > >    
> > I'm on ToT of current master.
> > Tried starting a bisect, but couldn't find a working version ... went 
> > back until v2009.1 ... very strange.
> 
> some register settings, esp. in the case of the commit above, survive a
> soft-reset, so bisecting may not help unless the board is completely
> power-cycled between each iteration.
> 

Even power-cycling didn't help.

What I can clearly see on the scope is :

- RGMII is working fine on TSEC0
- RGMII Tx @ TSEC1 is dead (except 125MHz GTXClk), i.e. TxD[0:3] and
TxEn are always low.
- RGMII Rx from PHY works fine.

Adding some debug info to tsec.c shows that both MACs are configured the
same way, e.g. ecntrl regs are both set to RGMII.

I know this smells like a hardware issue - although I have 4 boards
behaving the same way ... and I *know* that both TSECs have been working
fine.

Can you think of any settings leading to this behaviour ?
Any help would be truly appreciated.


Regards,
André



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