[U-Boot] [PATCH] 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz

Wolfgang Denk wd at denx.de
Tue Jun 29 21:01:28 CEST 2010


Dear Poonam Aggrwal,

In message <1277301748-14249-1-git-send-email-poonam.aggrwal at freescale.com> you wrote:
> Use a slighly larger value of CLK_CTRL for DDR at 667MHz
> which fixes random crashes while linux booting.
> 
> Applicable for both NAND and NOR boot.
> 
> Signed-off-by: Sandeep Gopalpet <sandeep.kumar at freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
> ---
>  board/freescale/p1_p2_rdb/ddr.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
I have a theory that it's impossible to prove anything, but  I  can't
prove it.


More information about the U-Boot mailing list