[U-Boot] [PATCH] 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz
Wolfgang Denk
wd at denx.de
Tue Jun 29 21:01:28 CEST 2010
Dear Poonam Aggrwal,
In message <1277301748-14249-1-git-send-email-poonam.aggrwal at freescale.com> you wrote:
> Use a slighly larger value of CLK_CTRL for DDR at 667MHz
> which fixes random crashes while linux booting.
>
> Applicable for both NAND and NOR boot.
>
> Signed-off-by: Sandeep Gopalpet <sandeep.kumar at freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
> ---
> board/freescale/p1_p2_rdb/ddr.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
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