[U-Boot] [PATCH] orion5x: edminiv2: add libata support

Albert Aribaud albert.aribaud at free.fr
Wed Jun 30 23:30:18 CEST 2010


Signed-off-by: Albert Aribaud <albert.aribaud at free.fr>
---
This patch:
- adds support in libata for the orion5x MVSATAHC controller;
- enables orion5x MVSTAHC port 1 on the edmini board;
- adds IDE and EXT2 commands to the edminiv2 command set.

 arch/arm/include/asm/arch-orion5x/orion5x.h |   20 ++++++++++++++-
 board/LaCie/edminiv2/config.mk              |    6 ++++-
 board/LaCie/edminiv2/edminiv2.c             |   22 +++++++++++++++++
 common/cmd_ide.c                            |   14 +++++++---
 include/configs/edminiv2.h                  |   35 +++++++++++++++++++++++++-
 5 files changed, 88 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h
index 4008c84..2724a70 100644
--- a/arch/arm/include/asm/arch-orion5x/orion5x.h
+++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
@@ -38,7 +38,7 @@
 #if defined(CONFIG_FEROCEON)
 #include <asm/arch/cpu.h>
 
-/* SOC specific definations */
+/* SOC specific definitions */
 #define ORION5X_REGISTER(x)			(ORION5X_REGS_PHY_BASE + x)
 
 /* Documented registers */
@@ -54,7 +54,23 @@
 #define ORION5X_REG_PCIE_BASE			(ORION5X_REGISTER(0x40000))
 #define ORION5X_USB20_PORT0_BASE		(ORION5X_REGISTER(0x50000))
 #define ORION5X_USB20_PORT1_BASE		(ORION5X_REGISTER(0xA0000))
-#define ORION5X_EGIGA_BASE			(ORION5X_REGISTER(0x72000))
+#define ORION5X_SATA_BASE			(ORION5X_REGISTER(0x80000))
+#define ORION5X_SATA_PORT0_OFFSET		0x2000
+#define ORION5X_SATA_PORT1_OFFSET		0x4000
+
+/*
+ * SATA definitions needed for controller initialization
+ */
+/* SControl register address */
+#define ORION5X_SATA_PORT1_SCONTROL_REG \
+	(ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET+0x308)
+/* Mask and values for device DETection and link initialization */
+#define ORION5X_SATA_SCONTROL_DET_MASK		0x0000000F
+#define ORION5X_SATA_SCONTROL_DET_NONE		0x00000000
+#define ORION5X_SATA_SCONTROL_DET_INIT		0x00000001
+/* Mask and values for device Interface Power Management */
+#define ORION5X_SATA_SCONTROL_IMP_MASK		0x00000F00
+#define ORION5X_SATA_SCONTROL_IMP_NO_LP_ALLOWED	0x00000300
 
 #define CONFIG_MAX_RAM_BANK_SIZE		(64*1024*1024)
 
diff --git a/board/LaCie/edminiv2/config.mk b/board/LaCie/edminiv2/config.mk
index 3dec1aa..1606cca 100644
--- a/board/LaCie/edminiv2/config.mk
+++ b/board/LaCie/edminiv2/config.mk
@@ -24,4 +24,8 @@
 # MA 02110-1301 USA
 #
 
-TEXT_BASE = 0x00100000
+# As the Linux  kernel will load from 00008000 up and we cannot tell
+# how big it can be, let U-Boot run in the topmost megabyte of the
+# ED Mini V2 64 megabyte DRAM.
+
+TEXT_BASE = 0x03F00000
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index 54c0ffe..6b4f0e5 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -80,13 +80,35 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
 }
 #endif				/* CONFIG_SYS_FLASH_CFI */
 
+/* ED Mini V2 uses SATA PORT1. Initialize this port and disable
+ * disable low power on it
+ */
+ /* mask for isolating IPM and DET fields in SControl register */
+#define EDMINIV2_SCONTROL_MASK (ORION5X_SATA_SCONTROL_DET_MASK \
+	|| ORION5X_SATA_SCONTROL_IMP_MASK)
+/* IPM and DET values for initializing link */
+#define EDMINIV2_PORT_INIT (ORION5X_SATA_SCONTROL_DET_INIT \
+	|| ORION5X_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
+/* IPM and DET values to use link once initialized */
+#define EDMINIV2_PORT_USE (ORION5X_SATA_SCONTROL_DET_NONE \
+	|| ORION5X_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
+
 int board_init(void)
 {
+	u32 reg;
+
 	/* arch number of board */
 	gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
 
 	/* boot parameter start at 256th byte of RAM base */
 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
+	/* reset port 1 of SATAHC controller */
+	reg = readl(ORION5X_SATA_PORT1_SCONTROL_REG);
+	reg = (reg & ~EDMINIV2_SCONTROL_MASK) | EDMINIV2_PORT_INIT;
+	writel(reg, ORION5X_SATA_PORT1_SCONTROL_REG);
+	reg = (reg & ~EDMINIV2_SCONTROL_MASK) | EDMINIV2_PORT_USE;
+	writel(reg, ORION5X_SATA_PORT1_SCONTROL_REG);
+
 	return 0;
 }
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index 8bd8920..08ebbf6 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -45,6 +45,10 @@
 #include <mpc5xxx.h>
 #endif
 
+#ifdef CONFIG_ORION5X
+#include <asm/arch/orion5x.h>
+#endif
+
 #include <ide.h>
 #include <ata.h>
 
@@ -854,7 +858,8 @@ input_swap_data(int dev, ulong *sect_buf, int words)
 #endif	/* __LITTLE_ENDIAN || CONFIG_AU1X00 */
 
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) \
+	|| defined(__ARM__)
 static void
 output_data(int dev, ulong *sect_buf, int words)
 {
@@ -906,7 +911,8 @@ output_data(int dev, ulong *sect_buf, int words)
 }
 #endif	/* __PPC__ */
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH) \
+	|| defined(__ARM__)
 static void
 input_data(int dev, ulong *sect_buf, int words)
 {
@@ -1580,7 +1586,7 @@ int ide_device_present(int dev)
  * ATAPI Support
  */
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(__ARM__)
 /* since ATAPI may use commands with not 4 bytes alligned length
  * we have our own transfer functions, 2 bytes alligned */
 static void
@@ -1618,7 +1624,7 @@ output_data_shorts(int dev, ushort *sect_buf, int shorts)
 static void
 input_data_shorts(int dev, ushort *sect_buf, int shorts)
 {
-#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
+#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45) || defined(__ARM__)
 	uchar	*dbuf;
 	volatile uchar	*pbuf_even;
 	volatile uchar	*pbuf_odd;
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index c3d95a0..923cca9 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -52,6 +52,12 @@
 #define CONFIG_SYS_HZ		1000
 
 /*
+ * __io is necessary for cmd_ide to compile
+ */
+
+#define __io
+
+/*
  * Board-specific values for Orion5x MPP low level init:
  * - MPPs 12 to 15 are SATA LEDs (mode 5)
  * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
@@ -60,7 +66,7 @@
 
 #define ORION5X_MPP0_7		0x00000003
 #define ORION5X_MPP8_15		0x55550000
-#define ORION5X_MPP16_23	0x00000000
+#define ORION5X_MPP16_23	0x00005555
 
 /*
  * Board-specific values for Orion5x GPIO low level init:
@@ -74,7 +80,6 @@
  */
 
 #define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
-#define ORION5X_GPIO_OUT_VALUE	0x03fcffff
 
 /*
  * NS16550 Configuration
@@ -131,6 +136,7 @@
  * Commands configuration - using default command set for now
  */
 #include <config_cmd_default.h>
+
 /*
  * Disabling some default commands for staggered bring-up
  */
@@ -139,6 +145,25 @@
 #undef CONFIG_CMD_NFS	/* no NFS since no net */
 
 /*
+ * ED Mini has a connector for SATA Port 1
+ */
+
+#define CONFIG_CMD_IDE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+
+#define CONFIG_LIBATA
+#define CONFIG_SYS_IDE_MAXBUS		1
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+#define CONFIG_SYS_ATA_BASE_ADDR	ORION5X_SATA_BASE
+#define CONFIG_SYS_ATA_IDE0_OFFSET	ORION5X_SATA_PORT1_OFFSET
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_STRIDE		4
+#define CONFIG_LBA48
+
+/*
  *  Environment variables configurations
  */
 #define CONFIG_ENV_IS_IN_FLASH		1
@@ -169,4 +194,10 @@
 #define CONFIG_SYS_RESET_ADDRESS	0xffff0000
 #define CONFIG_SYS_MAXARGS		16
 
+/* Debugging features */
+
+/* #define the following if u-boot will boot from RAM */
+/* #undef it if u-boot will boot from FLASH */
+#undef CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
+
 #endif /* _CONFIG_EDMINIV2_H */
-- 
1.6.4.4



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