[U-Boot] c code write to ip (r12) register in cpu/arm926ejs/start.S

[Bjørnar Syverstad]

Hello,
I use the phy3250 configuration. I try to debug the u-boot from the 256k internal ram.

I have:
- Undefined the CFG_BOOT_USES1L in include/configs/phy3250.h
- Set the location counter to . = 0x00000000 in board/phy3250/u-boot.lds
- In the board/phy3250/config.mk changed the TEXT_BASE = 0x00000000
-  Added the compiler flags  -fno-schedule-insns -fno-schedule-insns2

The problem is that when debugging  cpu/arm926ejs/start.S :

ip (r12) seems to be used by the c code that is called by some subrutine under lowlevel_init.
So when returning from lowlevel_init ip (r12) is have got another value.

So the jump out of cpu_init_crit fails.

I could change the code in start.S. But I do assume that it used a lot, and that it is not a bug.
Could the problem be that the compiling of the c files? That there is a way to tell the compiler
to not use the ip (r12) register?

/*
 *************************************************************************
 *
 * CPU_init_critical registers
 *
 * setup important registers
 * setup memory timing
 *
 *************************************************************************
 */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
                /*
                 * flush v4 I/D caches
                 */
                mov       r0, #0
                mcr        p15, 0, r0, c7, c7, 0           /* flush v3/v4 cache */
                mcr        p15, 0, r0, c8, c7, 0           /* flush v4 TLB */

                /*
                 * disable MMU stuff and caches
                 */
                mrc        p15, 0, r0, c1, c0, 0
                bic          r0, r0, #0x00002300        /* clear bits 13, 9:8 (--V- --RS) */
                bic          r0, r0, #0x00000087        /* clear bits 7, 2:0 (B--- -CAM) */
                orr          r0, r0, #0x00000002        /* set bit 2 (A) Align */
                orr          r0, r0, #0x00001000        /* set bit 12 (I) I-Cache */
                mcr        p15, 0, r0, c1, c0, 0

                /*
                 * Go setup Memory and board specific bits prior to relocation.
                 */
                mov       ip, lr                       /* perserve link reg across call */
                bl            lowlevel_init     /* go setup pll,mux,memory */
                mov       lr, ip                       /* restore link */
                mov       pc, lr                      /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */


Best Regards
Bjørnar Syverstad