[U-Boot] [PATCH] TI: Davinci: NAND Driver Cleanup

Nick Thompson nick.thompson at ge.com
Tue Mar 16 13:39:11 CET 2010


On 14/03/10 21:14, s-paulraj at ti.com wrote:
> From: Cyril Chemparathy <cyril at ti.com>
> 
> Modified to use IO accessor routines consistently.  Eliminated volatile usage
> to keep checkpatch.pl happy.
> Patch was tested on DM355, DM365 and DM6446 EVMs
> 
> Signed-off-by: Cyril Chemparathy <cyril at ti.com>
> Tested-by: Sandeep Paulraj <s-paulraj at ti.com>
> ---
>  drivers/mtd/nand/davinci_nand.c          |  126 ++++++++++++++++--------------
>  include/asm-arm/arch-davinci/emif_defs.h |   80 +++++++++----------
>  2 files changed, 104 insertions(+), 102 deletions(-)
> 
> diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
> index bfc2acf..61cba14 100644
> --- a/drivers/mtd/nand/davinci_nand.c
> +++ b/drivers/mtd/nand/davinci_nand.c
> @@ -57,7 +57,8 @@
>  #define ECC_STATE_ERR_CORR_COMP_P	0x2
>  #define ECC_STATE_ERR_CORR_COMP_N	0x3
>  
> -static emif_registers *const emif_regs = (void *) DAVINCI_ASYNC_EMIF_CNTRL_BASE;
> +static struct davinci_emif_regs *emif_regs =
> +	(struct  davinci_emif_regs *) DAVINCI_ASYNC_EMIF_CNTRL_BASE;

Since this is really just a constant, why setup a variable locally where
ever EMIF registers are accessed? What's wrong with the define you removed
below? ...

> diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h
> index aa57703..3d77bfc 100644
> --- a/include/asm-arm/arch-davinci/emif_defs.h
> +++ b/include/asm-arm/arch-davinci/emif_defs.h
> @@ -24,50 +24,42 @@
>  
>  #include <asm/arch/hardware.h>
>  
> -typedef struct davinci_emif_regs {
> -	dv_reg		ERCSR;
> -	dv_reg		AWCCR;
> -	dv_reg		SDBCR;
> -	dv_reg		SDRCR;
> -	dv_reg		AB1CR;
> -	dv_reg		AB2CR;
> -	dv_reg		AB3CR;
> -	dv_reg		AB4CR;
> -	dv_reg		SDTIMR;
> -	dv_reg		DDRSR;
> -	dv_reg		DDRPHYCR;
> -	dv_reg		DDRPHYSR;
> -	dv_reg		TOTAR;
> -	dv_reg		TOTACTR;
> -	dv_reg		DDRPHYID_REV;
> -	dv_reg		SDSRETR;
> -	dv_reg		EIRR;
> -	dv_reg		EIMR;
> -	dv_reg		EIMSR;
> -	dv_reg		EIMCR;
> -	dv_reg		IOCTRLR;
> -	dv_reg		IOSTATR;
> -	u_int8_t	RSVD0[8];
> -	dv_reg		NANDFCR;
> -	dv_reg		NANDFSR;
> -	u_int8_t	RSVD1[8];
> -	dv_reg		NANDFECC[4];
> -	u_int8_t	RSVD2[60];
> -	dv_reg		NAND4BITECCLOAD;
> -	dv_reg		NAND4BITECC1;
> -	dv_reg		NAND4BITECC2;
> -	dv_reg		NAND4BITECC3;
> -	dv_reg		NAND4BITECC4;
> -	dv_reg		NANDERRADD1;
> -	dv_reg		NANDERRADD2;
> -	dv_reg		NANDERRVAL1;
> -	dv_reg		NANDERRVAL2;
> -} emif_registers;
> -
> -typedef emif_registers	*emifregs;
> -
> -#define davinci_emif_regs \
> -	((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)

...This one.

Nick.


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