[U-Boot] [PATCH 24/28] nios2: convert ep1s10 board to use cfi flash

Thomas Chou thomas at wytron.com.tw
Fri Mar 19 08:43:49 CET 2010


The patch converts the ep1s10 board to use the common cfi flash
driver.

The addressing of devices is changed to virtual address.

Signed-off-by: Thomas Chou <thomas at wytron.com.tw>
---
 board/altera/ep1s10/Makefile   |    2 +-
 board/altera/ep1s10/config.mk  |    2 +-
 board/altera/ep1s10/u-boot.lds |    1 +
 include/configs/EP1S10.h       |   58 ++++++++++++++++++++++++----------------
 4 files changed, 38 insertions(+), 25 deletions(-)

diff --git a/board/altera/ep1s10/Makefile b/board/altera/ep1s10/Makefile
index acad2aa..c57ef1a 100644
--- a/board/altera/ep1s10/Makefile
+++ b/board/altera/ep1s10/Makefile
@@ -28,7 +28,7 @@ endif
 
 LIB	= $(obj)lib$(BOARD).a
 
-COMOBJS := ../common/AMDLV065D.o ../common/epled.o
+COMOBJS := ../common/epled.o
 
 COBJS	:= $(BOARD).o $(COMOBJS)
 
diff --git a/board/altera/ep1s10/config.mk b/board/altera/ep1s10/config.mk
index dab2740..6cb9629 100644
--- a/board/altera/ep1s10/config.mk
+++ b/board/altera/ep1s10/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x01fc0000
+#TEXT_BASE = 0x01fc0000
 
 PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
 PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
diff --git a/board/altera/ep1s10/u-boot.lds b/board/altera/ep1s10/u-boot.lds
index e2eb3aa..fa7ed30 100644
--- a/board/altera/ep1s10/u-boot.lds
+++ b/board/altera/ep1s10/u-boot.lds
@@ -28,6 +28,7 @@ ENTRY(_start)
 
 SECTIONS
 {
+	. = text_base;
 	.text :
 	{
 	  cpu/nios2/start.o (.text)
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
index 41e64e6..38320f3 100644
--- a/include/configs/EP1S10.h
+++ b/include/configs/EP1S10.h
@@ -24,6 +24,9 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_BOARD_NAME "EP1S10"
+#define IO_REGION_BASE 0x80000000
+
 /*------------------------------------------------------------------------
  * BOARD/CPU
  *----------------------------------------------------------------------*/
@@ -32,7 +35,7 @@
 
 #define CONFIG_SYS_RESET_ADDR		0x00000000	/* Hard-reset address	*/
 #define CONFIG_SYS_EXCEPTION_ADDR	0x01000020	/* Exception entry point*/
-#define CONFIG_SYS_NIOS_SYSID_BASE	0x021208b8	/* System id address	*/
+#define CONFIG_SYS_NIOS_SYSID_BASE	0x821208b8	/* System id address	*/
 
 /*------------------------------------------------------------------------
  * CACHE -- the following will support II/s and II/f. The II/s does not
@@ -46,12 +49,12 @@
 /*------------------------------------------------------------------------
  * MEMORY BASE ADDRESSES
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_FLASH_BASE		0x00000000	/* FLASH base addr	*/
+#define CONFIG_SYS_FLASH_BASE		0x80000000	/* FLASH base addr	*/
 #define CONFIG_SYS_FLASH_SIZE		0x00800000	/* 8 MByte		*/
 #define CONFIG_SYS_SDRAM_BASE		0x01000000	/* SDRAM base addr	*/
 #define CONFIG_SYS_SDRAM_SIZE		0x01000000	/* 16 MByte		*/
 #define CONFIG_SYS_SRAM_BASE		0x02000000	/* SRAM base addr	*/
-#define CONFIG_SYS_SRAM_SIZE		0x00100000	/* 1 MB			*/
+#define CONFIG_SYS_SRAM_SIZE		0x00100000	/* 1 MB (only 1M mapped)*/
 
 /*------------------------------------------------------------------------
  * MEMORY ORGANIZATION
@@ -60,46 +63,56 @@
  *	-Global data is placed below the heap.
  *	-The stack is placed below global data (&grows down).
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256k		*/
+#define CONFIG_SYS_TEXT_LEN		(256 * 1024)	/* Reserve 256k */
+#define CONFIG_SYS_TEXT_BASE		(CONFIG_SYS_SDRAM_BASE + \
+					 CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_TEXT_LEN)
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_RESET_ADDR | IO_REGION_BASE)
+#define CONFIG_SYS_MONITOR_LEN		CONFIG_SYS_TEXT_LEN
 #define CONFIG_SYS_GBL_DATA_SIZE	128		/* Global data size rsvd*/
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 256*1024) /* 256k heap */
 
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
-#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN)
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP		CONFIG_SYS_GBL_DATA_OFFSET
 
 /*------------------------------------------------------------------------
  * FLASH (AM29LV065D)
  *----------------------------------------------------------------------*/
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix nios2 flash timing issue in amd toggle*/
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+
 #define CONFIG_SYS_MAX_FLASH_SECT	128		/* Max # sects per bank */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1		/* Max # of flash banks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	8000		/* Erase timeout (msec) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	100		/* Write timeout (msec) */
 
 /*------------------------------------------------------------------------
  * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
- * CONFIG_SYS_FLASH_BASE, since we assume that u-boot is stored at the bottom
- * of flash memory. This will keep the environment in user region
+ * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
+ * reset address, no? This will keep the environment in user region
  * of flash. NOTE: the monitor length must be multiple of sector size
  * (which is common practice).
  *----------------------------------------------------------------------*/
 #define CONFIG_ENV_IS_IN_FLASH	1		/* Environment in flash */
 #define CONFIG_ENV_SIZE		(64 * 1024)	/* 64 KByte (1 sector)	*/
 #define CONFIG_ENV_OVERWRITE			/* Serial change Ok	*/
-#define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
+#define CONFIG_ENV_ADDR	(CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN)
 
 /*------------------------------------------------------------------------
  * CONSOLE
  *----------------------------------------------------------------------*/
 #if defined(CONFIG_CONSOLE_JTAG)
-#define CONFIG_SYS_NIOS_CONSOLE	0x021208b0	/* JTAG UART base addr	*/
+#define CONFIG_ALTERA_JTAGUART
 #else
-#define CONFIG_SYS_NIOS_CONSOLE	0x02120840	/* UART base addr	*/
+#define CONFIG_ALTERA_UART
 #endif
 
-#define CONFIG_SYS_NIOS_FIXEDBAUD	1		/* Baudrate is fixed	*/
-#define CONFIG_BAUDRATE		115200		/* Initial baudrate	*/
+#define CONFIG_SYS_JTAGUART_BASE	0x821208b0	/* JTAG UART base addr	*/
+#define CONFIG_SYS_UART_BASE		0x82120840	/* UART base addr	*/
+
+#define CONFIG_SYS_UART_FREQ		CONFIG_SYS_CLK_FREQ
+#define CONFIG_BAUDRATE			115200		/* Initial baudrate	*/
 #define CONFIG_SYS_BAUDRATE_TABLE	{115200}	/* It's fixed ;-)	*/
 
 #define CONFIG_SYS_CONSOLE_INFO_QUIET	1		/* Suppress console info*/
@@ -107,7 +120,6 @@
 /*------------------------------------------------------------------------
  * EPCS Device -- None for stratix.
  *----------------------------------------------------------------------*/
-#undef CONFIG_SYS_NIOS_EPCSBASE
 
 /*------------------------------------------------------------------------
  * DEBUG
@@ -121,22 +133,22 @@
  * registers, we can slow it down to 10 msec using TMRCNT. If the default
  * period is acceptable, TMRCNT can be left undefined.
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_NIOS_TMRBASE	0x02120820	/* Tick timer base addr */
-#define CONFIG_SYS_NIOS_TMRIRQ		3		/* Timer IRQ num	*/
-#define CONFIG_SYS_NIOS_TMRMS		10		/* 10 msec per tick	*/
-#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
-#define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1))
+#define CONFIG_SYS_TIMER_BASE		0x82120820	/* Tick timer base addr */
+#define CONFIG_SYS_TIMER_IRQ		3		/* Timer IRQ num	*/
+#define CONFIG_SYS_TIMER_FREQ		CONFIG_SYS_CLK_FREQ	/* Timer input freq     */
+#define CONFIG_SYS_HZ			1000		/* should be 1000 for flash timing */
 
 /*------------------------------------------------------------------------
  * STATUS LED -- Provides a simple blinking led. For Nios2 each board
  * must implement its own led routines -- since leds are board-specific.
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_LEDPIO_ADDR		0x02120870	/* LED PIO base addr	*/
+#define CONFIG_SYS_LED_PIO_BASE		0x82120870	/* LED PIO base addr	*/
+#define CONFIG_EPLED				/* Enable LED PIO driver */
 #define CONFIG_STATUS_LED			/* Enable status driver */
 
 #define STATUS_LED_BIT		1		/* Bit-0 on PIO		*/
 #define STATUS_LED_STATE	1		/* Blinking		*/
-#define STATUS_LED_PERIOD	(500/CONFIG_SYS_NIOS_TMRMS) /* Every 500 msec	*/
+#define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 2)	/* Every 500 msec	*/
 
 /*------------------------------------------------------------------------
  * ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
-- 
1.6.6.1



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