[U-Boot] [PATCH] mpc86xx: set the DDR BATs after calculating true DDR size

[Kumar Gala]

On Mar 29, 2010, at 10:40 PM, Timur Tabi wrote:

> On Mon, Mar 29, 2010 at 10:02 PM, Kumar Gala <galak at kernel.crashing.org> wrote:
> 
>> + * We also assume that the XBL bits are ignored by the processor (even if set)
>> + * if extended BAT addressing is disabled.
> 
> Since we don't read/modify/write that BATs, this comment is probably
> not true any more.
> 
>> -#define BATU_SIZE(x) (1UL << (fls((x & BATU_BL_MAX) >> 2) + 17))
>> +#define BATU_SIZE(x) (1ULL << (fls((x & BATU_BL_MAX) >> 2) + 17))
>> +
>> +#define TO_BATU_BL(x) ((((x)/(128*1024)) - 1) * 4) /* bytes into BATU_BL */
> 
> I don't think this works if (x) is not a power of two.  E.g.,
> TO_BATU_BL(1.5GB) = 0xbffc.  It should truncate the number to 1GB and
> give us 7ffc.  This is one of the issues that Becky raised.  I don't
> know if there's some simple way to truncate a number to its lowest
> power of two.

Good point, we can do something like to cover to power two first:

	(1 << __ilog2_u64(x))

>> --- a/include/configs/MPC8610HPCD.h
>> +++ b/include/configs/MPC8610HPCD.h
>> @@ -341,10 +341,8 @@
>>  * BAT0                2G      Cacheable, non-guarded
>>  * 0x0000_0000 2G      DDR
>>  */
>> -#define CONFIG_SYS_DBAT0L      (BATL_PP_RW | BATL_MEMCOHERENCE)
>> -#define CONFIG_SYS_DBAT0U      (BATU_BL_2G | BATU_VS | BATU_VP)
>> -#define CONFIG_SYS_IBAT0L      (BATL_PP_RW | BATL_MEMCOHERENCE )
>> -#define CONFIG_SYS_IBAT0U      CONFIG_SYS_DBAT0U
>> +#define CONFIG_SYS_DBAT0L      (BATL_PP_RW)
>> +#define CONFIG_SYS_IBAT0L      (BATL_PP_RW)
>> 
>>  /*
>>  * BAT1                1G      Cache-inhibited, guarded
>> diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
>> index 12a8f60..94e4d24 100644
>> --- a/include/configs/MPC8641HPCN.h
>> +++ b/include/configs/MPC8641HPCN.h
>> @@ -482,9 +482,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
>>  * BAT0                DDR
>>  */
>>  #define CONFIG_SYS_DBAT0L      (BATL_PP_RW | BATL_MEMCOHERENCE)
>> -#define CONFIG_SYS_DBAT0U      (BATU_BL_2G | BATU_VS | BATU_VP)
>> -#define CONFIG_SYS_IBAT0L      (BATL_PP_RW | BATL_MEMCOHERENCE )
>> -#define CONFIG_SYS_IBAT0U      CONFIG_SYS_DBAT0U
>> +#define CONFIG_SYS_IBAT0L      (BATL_PP_RW | BATL_MEMCOHERENCE)
> 
> Why do we need BATL_MEMCOHERENCE on 8641 but not on 8610?

dual core on 8641, single core on 8610.

- k