[U-Boot] [PATCH] 85xx: Add defines for BUCSR bits to make code more readable

[Kumar Gala]

Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
 cpu/mpc85xx/release.S       |    5 +++--
 cpu/mpc85xx/start.S         |    7 ++++---
 include/asm-ppc/processor.h |    3 +++
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index 00c4c54..36ea8c3 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  * Kumar Gala <kumar.gala at freescale.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -61,7 +61,8 @@ __secondary_start_page:
 #endif
 
 	/* Enable branch prediction */
-	li	r3,0x201
+	lis	r3,BUCSR_ENABLE at h
+	ori	r3,r3,BUCSR_ENABLE at l
 	mtspr	SPRN_BUCSR,r3
 
 	/* Ensure TB is 0 */
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 386fa81..5f63979 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc.
  * Copyright (C) 2003  Motorola,Inc.
  *
  * See file CREDITS for list of people who contributed to this
@@ -185,8 +185,9 @@ _start_e500:
 
 	/* Enable Branch Prediction */
 #if defined(CONFIG_BTB)
-	li	r0,0x201		/* BBFI = 1, BPEN = 1 */
-	mtspr	BUCSR,r0
+	lis	r0,BUCSR_ENABLE at h
+	ori	r0,r0,BUCSR_ENABLE at l
+	mtspr	SPRN_BUCSR,r0
 #endif
 
 #if defined(CONFIG_SYS_INIT_DBCR)
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index c6da411..b6aeb9f 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -531,6 +531,9 @@
 #define SPRN_MCSRR0	0x23a	/* Machine Check Save and Restore Register 0 */
 #define SPRN_MCSRR1	0x23b	/* Machine Check Save and Restore Register 1 */
 #define SPRN_BUCSR	0x3f5	/* Branch Control and Status Register */
+#define	  BUCSR_BBFI	0x00000200	/* Branch buffer flash invalidate */
+#define	  BUCSR_BPEN	0x00000001	/* Branch prediction enable */
+#define   BUCSR_ENABLE (BUCSR_BBFI|BUCSR_BPEN)
 #define SPRN_BBEAR	0x201	/* Branch Buffer Entry Address Register */
 #define SPRN_BBTAR	0x202	/* Branch Buffer Target Address Register */
 #define SPRN_PID1	0x279	/* Process ID Register 1 */
-- 
1.6.0.6