[U-Boot] [PATCH] nios2: Set CONFIG_SYS_HZ to 1000 all nios2 boards.

[Scott McNutt]

Hi Thomas,

Thomas Chou wrote:
> On 03/31/2010 10:09 AM, Scott McNutt wrote:
>>> So it might be cleaner to let user define the HZ as the actual tick rate
>>> and increase the tick count by one in the tmr_isr.
>>>      
>> This was discussed/debated thoroughly over the past year:
>> CONFIG_SYS_HZ at 1000 is mandatory.
>>
>>   
>>> -    timestamp += CONFIG_SYS_NIOS_TMRMS;
>>> +    timestamp++;
>>>      
>> This means that each interrupt is exactly 1 msec. That's not what
>> was intended and not what was implemented Forcing the interrupt
>> period to 1 msec is an unnecessary constraint. If you want the isr
>> to increment the timestamp by 1, then set CONFIG_SYS_NIOS_TMRMS to 1
>> ... and set your timer accordingly.

> I tried to follow your patch "nios2: Set CONFIG_SYS_HZ to 1000 all nios2 
> boards". But got cfi flash buffer write timeout on EP2C35 board. If I 
> set TMRMS to 1, it works with HZ at 100, 1000 and 2000.

The patch should not affect your EP2C35 board configuration since it
hasn't been added yet. So I'm not sure I understand the scenario you
are describing. If your TMRMS is set to 1 and your TMRCNT is set to
match, then you should be ticking at 1000 Hz. And if CONFIG_SYS_HZ
is set to 1000, we should achieve oneness with u-boot ;-)

In any case, for the benefit of the nios2 folks who might be
following this thread:

CONFIG_SYS_TMRMS -- this is the _actual_ period (in msec) of the
timer interrupt that is added to the timestamp on every interrupt.
It's what board developers choose based on their requirements. It's
intended to be cpu clock and timer configuration agnostic.

CONFIG_SYS_NIOS_TMRCNT -- this is what (optionally) gets loaded into
the timer period registers. If the default configuration of the timer
matches TMRMS, then there's no need to define this value. However,
if for some reason you want to slow down the interrupt frequency,
you can do so by defining an appropriate value.

How to calculate these values is up to the board developer. For the
Altera EP1xxx boards, we start with a desired period of 10 ms, so
TMRMS is set to 10. Then TMRCNT is calculated based on the system
clock frequency.

And none of the above has anything to do with CONFIG_SYS_HZ ... which
for the most part is just a synonym for the value 1000. If you set
CONFIG_SYS_HZ to anything less than 1000 you end up with a timeout
of zero in cfi_flash ... at least until we rebase to the mothership
to get the latest cfi patches ... at which point it should be 1.
A timeout of zero is probably not what we want. ;-)

In any case, I'll try to fire up my 2C35 board and have a look.

Best Regards,
--Scott