[U-Boot] [PATCH] AX88180: switch to common mii.h header
Mike Frysinger
vapier at gentoo.org
Mon May 10 22:47:36 CEST 2010
No compiled code change here, just drop the local PHY defines in favor of
the common standard ones.
Signed-off-by: Mike Frysinger <vapier at gentoo.org>
---
drivers/net/ax88180.c | 31 ++++++++++++++++---------------
drivers/net/ax88180.h | 48 ++----------------------------------------------
2 files changed, 18 insertions(+), 61 deletions(-)
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index 6e788a0..fa2e212 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -41,6 +41,7 @@
#include <command.h>
#include <net.h>
#include <malloc.h>
+#include <linux/mii.h>
#include "ax88180.h"
/*
@@ -112,10 +113,10 @@ static int ax88180_phy_reset (struct eth_device *dev)
{
unsigned short delay_cnt = 500;
- ax88180_mdio_write (dev, BMCR, (PHY_RESET | AUTONEG_EN));
+ ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE));
/* Wait for the reset to complete, or time out (500 ms) */
- while (ax88180_mdio_read (dev, BMCR) & PHY_RESET) {
+ while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) {
udelay (1000);
if (--delay_cnt == 0) {
printf ("Failed to reset PHY!\n");
@@ -265,10 +266,10 @@ static int ax88180_phy_initial (struct eth_device *dev)
#endif
{
priv->PhyAddr = phyaddr;
- priv->PhyID0 = ax88180_mdio_read(dev, PHYIDR0);
+ priv->PhyID0 = ax88180_mdio_read(dev, MII_PHYSID1);
switch (priv->PhyID0) {
- case MARVELL_88E1111_PHYIDR0:
+ case MARVELL_88E1111_PHYSID0:
debug("ax88180: Found Marvell 88E1111 PHY."
" (PHY Addr=0x%x)\n", priv->PhyAddr);
@@ -282,7 +283,7 @@ static int ax88180_phy_initial (struct eth_device *dev)
return 1;
- case CICADA_CIS8201_PHYIDR0:
+ case CICADA_CIS8201_PHYSID0:
debug("ax88180: Found CICADA CIS8201 PHY"
" chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
@@ -321,20 +322,20 @@ static void ax88180_media_config (struct eth_device *dev)
/* Waiting 2 seconds for PHY link stable */
for (i = 0; i < 20000; i++) {
- bmsr_val = ax88180_mdio_read (dev, BMSR);
- if (bmsr_val & LINKOK) {
+ bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
+ if (bmsr_val & BMSR_LSTATUS) {
break;
}
udelay (100);
}
- bmsr_val = ax88180_mdio_read (dev, BMSR);
+ bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
debug ("ax88180: BMSR=0x%04x\n", (unsigned int)bmsr_val);
- if (bmsr_val & LINKOK) {
- bmcr_val = ax88180_mdio_read (dev, BMCR);
+ if (bmsr_val & BMSR_LSTATUS) {
+ bmcr_val = ax88180_mdio_read (dev, MII_BMCR);
- if (bmcr_val & AUTONEG_EN) {
+ if (bmcr_val & BMCR_ANENABLE) {
/*
* Waiting for Auto-negotiation completion, this may
@@ -343,8 +344,8 @@ static void ax88180_media_config (struct eth_device *dev)
debug ("ax88180: Auto-negotiation is "
"enabled. Waiting for NWay completion..\n");
for (i = 0; i < 50000; i++) {
- bmsr_val = ax88180_mdio_read (dev, BMSR);
- if (bmsr_val & AUTONEG_COMPLETE) {
+ bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
+ if (bmsr_val & BMSR_ANEGCOMPLETE) {
break;
}
udelay (100);
@@ -357,10 +358,10 @@ static void ax88180_media_config (struct eth_device *dev)
/* Get real media mode here */
switch (priv->PhyID0) {
- case MARVELL_88E1111_PHYIDR0:
+ case MARVELL_88E1111_PHYSID0:
RealMediaMode = get_MarvellPHY_media_mode(dev);
break;
- case CICADA_CIS8201_PHYIDR0:
+ case CICADA_CIS8201_PHYSID0:
RealMediaMode = get_CicadaPHY_media_mode(dev);
break;
default:
diff --git a/drivers/net/ax88180.h b/drivers/net/ax88180.h
index 77bab5f..c793e92 100644
--- a/drivers/net/ax88180.h
+++ b/drivers/net/ax88180.h
@@ -63,9 +63,9 @@ struct ax88180_private {
/* Max Rx Jumbo size is 15K Bytes */
#define MAX_RX_SIZE 0x3C00
-#define MARVELL_88E1111_PHYIDR0 0x0141
+#define MARVELL_88E1111_PHYSID0 0x0141
-#define CICADA_CIS8201_PHYIDR0 0x000F
+#define CICADA_CIS8201_PHYSID0 0x000F
#define MEDIA_AUTO 0
#define MEDIA_1000FULL 1
@@ -276,50 +276,6 @@ struct ax88180_private {
#define SOFTRST_NORMAL 0x00000003
#define SOFTRST_RESET_MAC 0x00000002
-/* External PHY Register Definition */
-#define BMCR 0x0000
- #define LINE_SPEED_MSB 0x0040
- #define DUPLEX_MODE 0x0100
- #define RESTART_AUTONEG 0x0200
- #define POWER_DOWN 0x0800
- #define AUTONEG_EN 0x1000
- #define LINE_SPEED_LSB 0x2000
- #define PHY_RESET 0x8000
-
- #define MEDIAMODE_MASK (LINE_SPEED_MSB | LINE_SPEED_LSB |\
- DUPLEX_MODE)
- #define BMCR_SPEED_1000 LINE_SPEED_MSB
- #define BMCR_SPEED_100 LINE_SPEED_LSB
- #define BMCR_SPEED_10 0x0000
-
- #define BMCR_1000FULL (BMCR_SPEED_1000 | DUPLEX_MODE)
- #define BMCR_100FULL (BMCR_SPEED_100 | DUPLEX_MODE)
- #define BMCR_100HALF BMCR_SPEED_100
- #define BMCR_10FULL DUPLEX_MODE
- #define BMCR_10HALF 0x0000
-#define BMSR 0x0001
- #define LINKOK 0x0004
- #define AUTONEG_ENABLE_STS 0x0008
- #define AUTONEG_COMPLETE 0x0020
-#define PHYIDR0 0x0002
-#define PHYIDR1 0x0003
-#define ANAR 0x0004
- #define ANAR_PAUSE 0x0400
- #define ANAR_100FULL 0x0100
- #define ANAR_100HALF 0x0080
- #define ANAR_10FULL 0x0040
- #define ANAR_10HALF 0x0020
- #define ANAR_8023BIT 0x0001
-#define ANLPAR 0x0005
-#define ANER 0x0006
-#define AUX_1000_CTRL 0x0009
- #define ENABLE_1000HALF 0x0100
- #define ENABLE_1000FULL 0x0200
- #define DEFAULT_AUX_1000_CTRL (ENABLE_1000HALF | ENABLE_1000FULL)
-#define AUX_1000_STATUS 0x000A
- #define LP_1000HALF 0x0400
- #define LP_1000FULL 0x0800
-
/* Marvell 88E1111 Gigabit PHY Register Definition */
#define M88_SSR 0x0011
#define SSR_SPEED_MASK 0xC000
--
1.7.1
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