[U-Boot] [PATCH] Move ICS CLK chip frequenty calculation code into a common board library
Timur Tabi
timur at freescale.com
Fri May 21 21:35:57 CEST 2010
On Fri, May 21, 2010 at 1:59 PM, Timur Tabi <timur.tabi at gmail.com> wrote:
> Is this rounding algorithm the reason why I get output like this:
>
> Clock Configuration:
> CPU0:799.992 MHz, CPU1:799.992 MHz,
> CCB:399.996 MHz,
> DDR:299.997 MHz (599.994 MT/s data rate) (Asynchronous), LBC:25
> MHz
>
> If so, maybe we should fix it?
To answer my own question: yes.
So here's a better version of that function that rounds to the nearest
MHz and is of a proper coding style:
static const unsigned long ics307_clk_freq(unsigned char cw0, unsigned char cw1,
unsigned char cw2)
{
static const u8 s2od[] = {
10, 2, 8, 4, 5, 7, 3, 6
};
unsigned long vdw = (cw1 << 1) | (cw2 >> 7);
unsigned long rdw = cw2 & 0x7f;
unsigned long od = s2od[cw0 & 0x7];
unsigned long freq;
freq = 2 * CONFIG_ICS307_REFCLK_HZ * (vdw + 8) / ((rdw + 2) * od);
/* Round freq to the nearest MHz */
freq += 500000;
freq /= 1000000;
freq *= 1000000;
debug("ICS307: CW[0-2]: %02X %02X %02X => %lu Hz\n", cw0, cw1, cw2,
freq);
return freq;
}
And the result:
Clock Configuration:
CPU0:800 MHz, CPU1:800 MHz,
CCB:400 MHz,
DDR:300 MHz (600 MT/s data rate) (Asynchronous), LBC:25 MHz
--
Timur Tabi
Linux kernel developer at Freescale
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