[U-Boot] [PATCH] 85xx/p2020ds: Use is_serdes_configured() to determine of PCIe enabled

[Kumar Gala]

On May 27, 2010, at 8:20 AM, Wolfgang Denk wrote:

> Dear Kumar Gala,
> 
> In message <7D2BA6A1-2EEF-4BF5-8B76-07AD55537BEE at kernel.crashing.org> you wrote:
>> 
>>> i. e. the highest number is at the lowest address??
>> 
>> Correct, that is matching FSL HW docs numbering/naming.
>> 
>> in the .dts the alias:
>> * "pci0" is @ 0x8000	- FSL HW calls it PCIE3
>> * "pci1" is @ 0x9000	- FSL HW calls it PCIE2
>> * "pci2" is @ 0xa000	- FSL HW calls it PCIE1
> 
> IMHO there were several decisions that I would not exactly call
> intelligent - the first to assign HW names in descending order, and
> the second to chose a different order for the bus names.
> 
> Now we sit here and have to suffer from this :-(

Agree on both fronts.

- k